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| this document contains detailed information on power considerations, dc/ac electrical characteristics, and ac timing speci?ations for the mpc8250 powerquicc ii communications processor. the following topics are addressed: topic page section 1.1, ?eatures 2 section 1.2, ?lectrical and thermal characteristics 5 section 1.2.1, ?c electrical characteristics 5 section 1.2.2, ?hermal characteristics 10 section 1.2.3, ?ower considerations 10 section 1.2.4, ac electrical characteristics 11 section 1.3, ?lock con?uration modes 19 section 1.3.1, ?ocal bus mode 19 section 1.3.2, ?ci mode 22 section 1.4, ?inout 28 section 1.5, ?ackage description 53 section 1.6, ?rdering information 56 the mpc8250 is available in two packages?he standard zu package (480 tbga) and an alternate vr package (516 pbga)?s described in section 1.4, ?inout,?and section 1.5, ?ackage description.?for more information on vr packages, contact your motorola sales of?e. note that throughout this document references to the mpc8250 are inclusive of its vr version unless otherwise speci?d. note: document revision history changes to this document are summarized in table 23 on page 56. technical data mpc8250 ec/d rev. 0.9 8/2003 mpc8250 hardw are speci?ations
2 mpc8250 hardware speci?ations motorola features figure 1 shows the block diagram for the mpc8250. figure 1. mpc8250 block diagram 1.1 features the major features of the mpc8250 are as follows: footprint-compatible with the mpc8260 dual-issue integer core a core version of the ec603e microprocessor system core microprocessor supporting frequencies of 150?00 mhz separate 16-kbyte data and instruction caches: four-way set associative physically addressed lru replacement algorithm powerpc architecture-compliant memory management unit (mmu) common on-chip processor (cop) test interface high-performance (4.4?.1 spec95 benchmark at 200 mhz; 280 dhrystones mips at 200 mhz) supports bus snooping for data cache coherency floating-point unit (fpu) 16 kbytes g2 core i-cache i-mmu 16 kbytes d-cache d-mmu communication processor module (cpm) timers parallel i/o baud rate generators 32 kbytes 32-bit risc microcontroller and program rom serial dmas 4 virtual idmas 60x-to-pci bridge bridge memory controller clock counter system functions system interface unit (siu) local bus 32 bits, up to 66 mhz pci bus 32 bits, up to 66 mhz or mcc2 fcc1 fcc2 fcc3 scc1 scc2 scc3 scc4 smc1 smc2 spi i 2 c serial interface 3 mii ports 60x bus dual-port ram interrupt controller time slot assigner 4 tdm ports non-multiplexed i/o 60x-to-local bus interface unit motorola mpc8250 hardware speci?ations 3 features separate power supply for internal logic (1.8 v) and for i/o (3.3v) separate plls for g2 core and for the cpm g2 core and cpm can run at different frequencies for power/performance optimization internal core/bus clock multiplier that provides 1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios internal cpm/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios 64-bit data and 32-bit address 60x bus bus supports multiple master designs supports single- and four-beat burst transfers 64-, 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller supports data parity or ecc and address parity 32-bit data and 18-bit address local bus single-master bus, supports external slaves eight-beat burst transfers 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller 60x-to-pci bridge programmable host bridge and agent 32-bit data bus, 66 mhz, 3.3 v synchronous and asynchronous 60x and pci clock modes all internal address space available to external pci host dma for memory block transfers pci-to-60x address remapping system interface unit (siu) clock synthesizer reset controller real-time clock (rtc) register periodic interrupt timer hardware bus monitor and software watchdog timer ieee 1149.1 jtag test access port twelve-bank memory controller glueless interface to sram, page mode sdram, dram, eprom, flash and other user- de?able peripherals byte write enables and selectable parity generation 32-bit address decodes with programmable bank size three user programmable machines, general-purpose chip-select machine, and page-mode pipeline sdram machine byte selects for 64 bus width (60x) and byte selects for 32 bus width (local) dedicated interface logic for sdram cpu core can be disabled and the device can be used in slave mode to an external core 4 mpc8250 hardware speci?ations motorola features communications processor module (cpm) embedded 32-bit communications processor (cp) uses a risc architecture for ?xible support for communications protocols interfaces to g2 core through on-chip 32-kbyte dual-port ram and dma controller serial dma channels for receive and transmit on all serial channels parallel i/o registers with open-drain and interrupt capability virtual dma functionality executing memory-to-memory and memory-to-i/o transfers three fast communications controllers supporting the following protocols: 10/100-mbit ethernet/ieee 802.3 cdma/cs interface through media independent interface (mii) transparent hdlc?p to t3 rates (clear channel) one multichannel controller (mcc2) handles 128 serial, full-duplex, 64-kbps data channels. the mcc can be split into four subgroups of 32 channels each. almost any combination of subgroups can be multiplexed to single or multiple tdm interfaces up to four tdm interfaces per mcc four serial communications controllers (sccs) identical to those on the mpc860, supporting the digital portions of the following protocols: ethernet/ieee 802.3 cdma/cs hdlc/sdlc and hdlc bus universal asynchronous receiver transmitter (uart) synchronous uart binary synchronous (bisync) communications transparent two serial management controllers (smcs), identical to those of the mpc860 provide management for bri devices as general circuit interface (gci) controllers in time- division-multiplexed (tdm) channels transparent uart (low-speed operation) one serial peripheral interface identical to the mpc860 spi one inter-integrated circuit (i 2 c) controller (identical to the mpc860 i 2 c controller) microwire compatible multiple-master, single-master, and slave modes up to four tdm interfaces supports one group of four tdm channels 2,048 bytes of si ram bit or byte resolution independent transmit and receive routing, frame synchronization motorola mpc8250 hardware speci?ations 5 electrical and thermal characteristics supports t1, cept, t1/e1, t3/e3, pulse code modulation highway, isdn basic rate, isdn primary rate, motorola interchip digital link (idl), general circuit interface (gci), and user-de?ed tdm serial interfaces eight independent baud rate generators and 20 input clock pins for supplying clocks to fccs, sccs, smcs, and serial channels four independent 16-bit timers that can be interconnected as two 32-bit timers pci bridge pci speci?ation revision 2.2 compliant and supports frequencies up to 66 mhz on-chip arbitration support for pci to 60x memory and 60x memory to pci streaming pci host bridge or periphera l capabilities includes 4 dma channels for the following transfers: pci-to-60x to 60x-to-pci 60x-to-pci to pci-to-60x pci-to-60x to pci-to-60x 60x-to-pci to 60x-to-pci includes all of the con?uration registers (which are automatically loaded from the eprom and used to con?ure the mpc8265a) required by the pci standard as well as message and doorbell registers supports the i 2 o standard hot-swap friendly (supports the hot swap speci?ation as de?ed by picmg 2.1 r1.0 august 3, 1998) support for 66 mhz, 3.3 v speci?ation 60x-pci bus core logic which uses a buffer pool to allocate buffers for each port makes use of the local bus signals, so there is no need for additional pins 1.2 electrical and thermal characteristics this section provides ac and dc electrical speci?ations and thermal characteristics for the mpc8250. 1.2.1 dc electrical characteristics this section describes the dc electrical characteristics for the mpc8250. table 1 shows the maximum electrical ratings. 6 mpc8250 hardware speci?ations motorola electrical and thermal characteristics table 2 lists recommended operational voltage conditions. note: core, pll, and i/o supply voltages vddh, vccsyn, and vdd must track each other and both must vary in the same direction?n the positive direction (+5% and +0.1 vdc) or in the negative direction (-5% and -0.1 vdc). this device contains circuitry protecting against damage due to high static voltage or electrical ?lds; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (either gnd or v cc ). figure 2 shows the undershoot and overshoot voltage of the 60x and local bus memory interface of the mpc8280. note that in pci mode the i/o interface is different. table 1. absolute maximum ratings 1 1 absolute maximum ratings are stress ratings only; functional operation (see table 2) at the maximums is not guaranteed. stress beyond those listed may affect device reliability or cause permanent damage. rating symbol value unit core supply voltage 2 2 caution: vdd/vccsyn must not exceed vddh by more than 0.4 v at any time, including during power-on reset. vdd -0.3 ?2.5 v pll supply voltage 2 vccsyn -0.3 ?2.5 v i/o supply voltage 3 3 caution: vddh can exceed vdd/vccsyn by 3.3 v during power on reset by no more than 100 msec. vddh should not exceed vdd/vccsyn by more than 2.5 v during normal operation. vddh -0.3 ?4.0 v input voltage 4 4 caution: vin must not exceed vddh by more than 2.5 v at any time, including during power-on reset. vin gnd(-0.3) ?3.6 v junction temperature t j 120 ?c storage temperature range t stg (-55) ?(+150) ?c table 2. recommended operating conditions 1 1 caution: these are the recommended and tested operating conditions. proper device operating outside of these conditions is not guaranteed. rating symbol value unit core supply voltage vdd 1.7 ?1.9 2 2 cpu frequency less than or equal to 200 mhz. 1.7?.1 3 3 cpu frequency greater than 200 mhz but less than 233 mhz. 1.9 ?.2 4 4 cpu frequency greater than or equal to 233 mhz. v pll supply voltage vccsyn 1.7 ?1.9 2 1.7?.1 3 1.9?.2 4 v i/o supply voltage vddh 3.135 ?3.465 v input voltage vin gnd (-0.3) ?3.465 v junction temperature (maximum) t j 105 5 5 note that for extended temperature parts the range is (-40) t a ?105 t j . ?c ambient temperature t a 0?0 5 ?c motorola mpc8250 hardware speci?ations 7 electrical and thermal characteristics figure 2. overshoot/undershoot voltage table 3 shows dc electrical characteristics. table 3. dc electrical characteristics 1 characteristic symbol min max unit input high voltage, all inputs except clkin v ih 2.0 3.465 v input low voltage v il gnd 0.8 v clkin input high voltage v ihc 2.4 3.465 v clkin input low voltage v ilc gnd 0.4 v input leakage current, v in = vddh 2 i in ?0 a hi-z (off state) leakage current, v in = vddh 2 i oz ?0 a signal low input current, v il = 0.8 v i l ? a signal high input current, v ih = 2.0 v i h ? a output high voltage, i oh = ? ma v oh 2.4 v gnd gnd ?0.3 v gnd ?1.0 v not to exceed 10% gv dd of t sdram_clk gv dd + 5% 4 v v ih v il 8 mpc8250 hardware speci?ations motorola electrical and thermal characteristics i ol = 7.0ma br bg abb/irq2 ts a[0-31] tt[0-4] tbst tsize[0?] aa ck ar tr y dbg dbb /irq3 d[0-63] dp(0)/rsr v /ext_br2 dp(1)/irq1 /ext_bg2 dp(2)/tlbisync /irq2 /ext_dbg2 dp(3)/irq3 /ext_br3 /ckstp_out dp(4)/irq4 /ext_bg3 /core_srest dp(5)/tben/irq5 /ext_dbg3 dp(6)/cse(0)/irq6 dp(7)/cse(1)/irq7 psd v al t a tea gbl /irq1 ci/ baddr29/irq2 wt /baddr30/irq3 l2_hit /irq4 cpu_bg/ baddr31/irq5 cpu_dbg cpu_br irq0 /nmi_out irq7 /int_out /ape poreset hreset sreset rstconf qreq v ol 0.4 v table 3. dc electrical characteristics 1 (continued) characteristic symbol min max unit motorola mpc8250 hardware speci?ations 9 electrical and thermal characteristics i ol = 5.3ma cs [0-9] cs (10)/bctl1 cs (11)/ap(0) baddr[27?8] ale bctl0 pwe (0:7)/psddqm( 0:7)/pbs (0:7) psda10/pgpl0 psd we/ pgpl1 poe/psdras/pgpl2 psdcas/pgpl3 pgta/pupmwait/pgpl4/ppbs psdamux/pgpl5 lwe[0?]lsddqm[0:3]/lbs[0?]/pci_cfg[0? lsda10/lgpl0/pci_modckh0 lsdwe/lgpl1/pci_modckh1 loe/lsdras/lgpl2/pci_modckh2 lsdcas/lgpl3/pci_modckh3 lgta/lupmwait/lgpl4/lpbs lsdamux/lgpl5/pci_modck l wr modck1/ap(1)/tc(0)/bnksel(0) modck2/ap(2)/tc(1)/bnksel(1) modck3/ap(3)/tc(2)/bnksel(2) i ol = 3.2ma l_a14/par l_a15/frame /smi l_a16/trd y l_a17/ird y /ckstp_out l_a18/st op l_a19/devsel l_a20/idsel l_a21/perr l_a22/serr l_a23/req0 l_a24/req1 /hsejsw l_a25/gnt0 l_a26/gnt1 /hsled l_a27/gnt2 /hsenum l_a28/rst /core_sreset l_a29/int a l_a30/req2 l_a31 lcl_d(0-31)/ad(0-31) lcl_dp(0-3)/c/be (0-3) pa[0?1] pb[4?1] pc[0?1] pd[4?1] tdo v ol 0.4 v 1 the default con?uration of the cpm pins (pa[0?1], pb[4?1], pc[0?1], pd[4?1]) is input. to prevent excessive dc current, it is recommended to either pull unused pins to gnd or vddh, or to con?ure them as outputs. 2 the leakage current is measured for nominal vdd, vccsyn, and vdd. table 3. dc electrical characteristics 1 (continued) characteristic symbol min max unit 10 mpc8250 hardware speci?ations motorola electrical and thermal characteristics 1.2.2 thermal characteristics table 4 describes thermal characteristics. 1.2.3 power considerations the average chip-junction temperature , t j , in c can be obtained from the following: t j = t a + (p d x ja ) (1) where t a = ambient temperature c ja = package thermal resistance , junction to ambient , c/w p d = p int + p i/o p int = i dd x v dd watts (chip internal power) p i/o = power dissipation on input and output pins (determined by user) for most applications p i/o < 0.3 x p int . if p i/o is neglected , an approximate relationship between p d and t j is the following: p d = k/(t j + 273 c) (2) solving equations (1) and (2) for k gives: k = p d x (t a + 273 c) + ja x p d 2 (3) where k is a constant pertaining to the particular part. k can be determined from equation (3) by measuring p d (at equilibrium) for a known t a . using this value of k , the values of p d and t j can be obtained by solving equations (1) and (2) iteratively for any value of t a . table 4. thermal characteristics characteristic symbol value unit air flow 480 tbga (zu package) 516 pbga (vr package) junction to ambient single-layer board 1 1 assumes no thermal vias ja 13 24 c/w natural convection 10 18 1 m/s junction to ambient four-layer board 11 16 natural convection 8 13 1 m/s junction to board 2 2 thermal resistance between the die and the printed circuit board per jedec jesd51-8. board temperature is measured on the top surface of the board near the package. jb 48 c/w junction to case 3 3 thermal resistance between the die and the case top surface as measured by the cold plate method (mil spec-883 method 1012.1). jc 1.1 6 c/w motorola mpc8250 hardware speci?ations 11 electrical and thermal characteristics 1.2.3.1 layout practices each v cc pin should be provided with a low-impedance path to the board s power supply. each ground pin should likewise be provided with a low-impedance path to ground. the power supply pins drive distinct groups of logic on chip. the v cc power supply should be bypassed to ground using at least four 0.1 ? by-pass capacitors located as close as possible to the four sides of the package. the capacitor leads and associated printed circuit traces connecting to chip v cc and ground should be kept to less than half an inch per capacitor lead. a four-layer board is recommended, employing two inner layers as v cc and gnd planes. all output pins on the mpc8250 have fast rise and fall times. printed circuit (pc) trace interconnection length should be minimized in order to minimize overdamped conditions and re?ctions caused by these fast output switching times. this recommendation particularly applies to the address and data buses. maximum pc trace lengths of six inches are recommended. capacitance calculations should consider all device loads as well as parasitic capacitances due to the pc traces. attention to proper pcb layout and bypassing becomes especially critical in systems with higher capacitive loads because these loads create higher transient currents in the v cc and gnd circuits. pull up all unused inputs or signals that will be inputs during reset. special care should be taken to minimize the noise levels on the pll supply pins. table 5 provides preliminary, estimated power dissipation for various con?urations. note that suitable thermal management is required for conditions above p d = 3w (when the ambient temperature is 70? c or greater) to ensure the junction temperature does not exceed the maximum speci?d value. also note that the i/o power should be included when determining whether to use a heat sink. 1.2.4 ac electrical characteristics the following sections include illustrations and tables of clock diagrams, signals, and cpm outputs and inputs for the 66 mhz mpc8250 device. note that ac timings are based on a 50-p f load. typical output buffer impedances are shown in table 6. table 5. estimated power dissipation for various con?urations 1 1 test temperature = room temperature (25 ? c) bus (mhz) cpm multiplier core cpu multiplier cpm (mhz) cpu (mhz) p int (w) 2 2 p int = i dd x v dd watts vddl 1.8 volts vddl 2.0 volts nominal maximum nominal maximum 66.66 2 3 133 200 1.2 2 1.8 2.3 66.66 2.5 3 166 200 1.3 2.1 1.9 2.3 66.66 3 4 200 266 2.3 2.9 66.66 3 4.5 200 300 2.4 3.1 83.33 2 3 166 250 2.2 2.8 83.33 2 3 166 250 2.2 2.8 83.33 2.5 3.5 208 291 2.4 3.1 12 mpc8250 hardware speci?ations motorola electrical and thermal characteristics table 7 lists cpm output characteristics. table 8 lists cpm input characteristics. note that although the speci?ations generally reference the rising edge of the clock, the following ac timing diagrams also apply when the falling edge is the active edge. table 6. output buffer impedances 1 1 these are typical values at 65? c. the impedance may vary by ?5% with process and temperature. output buffers typical impedance ( ? ) 60x bus 40 local bus 40 memory controller 40 parallel i/o 46 pci 25 table 7. ac characteristics for cpm outputs 1 1 output speci?ations are measured from the 50% level of the rising edge of clkin to the 50% level of the signal. timings are measured at the pin. spec number characteristic max delay (ns) min delay (ns) max min 66 mhz 83 mhz 66 mhz 83 mhz sp36a sp37a fcc outputs?nternal clock (nmsi) 6 5.5 1 1 sp36b sp37b fcc outputs?xternal clock (nmsi) 14 12 2 1 sp40 sp41 tdm outputs/si 25 16 5 4 sp38a sp39a scc/smc/spi/i2c outputs?nternal clock (nmsi) 19 16 1 0.5 sp38b sp39b ex_scc/smc/spi/i2c outputs?xternal clock (nmsi) 19 16 2 1 sp42 sp43 timer/idma outputs 14 11 1 0.5 sp42a sp43a pio outputs 14 11 0.5 0.5 table 8. ac characteristics for cpm inputs 1 1 input speci?ations are measured from the 50% level of the signal to the 50% level of the rising edge of clkin. timings are measured at the pin. spec number characteristic setup (ns) hold (ns) max min 66 mhz 83 mhz 66 mhz 83 mhz sp16a sp17a fcc inputs?nternal clock (nmsi) 10 8 0 0 sp16b sp17b fcc inputs?xternal clock (nmsi) 3 2.5 3 2 sp20 sp21 tdm inputs/si 15 12 12 10 sp18a sp19a scc/smc/spi/i2c inputs?nternal clock (nmsi) 20 16 0 0 sp18b sp19b scc/smc/spi/i2c inputs?xternal clock (nmsi) 5454 sp22 sp23 pio/timer/idma inputs 10 8 3 3 motorola mpc8250 hardware speci?ations 13 electrical and thermal characteristics figure 3 shows the fcc external clock. figure 3. fcc external clock diagram figure 4 shows the fcc internal clock. figure 4. fcc internal clock diagram figure 5 shows the scc/smc/spi/i 2 c external clock. serial clkin fcc input signals fcc output signals fcc output signals note : when gfmr[tci] = 1 note : when gfmr[tci] = 0 sp16b sp17b sp36b/sp37b sp36b/sp37b brg_out fcc input signals fcc output signals fcc output signals note : when gfmr.tci = 1 note : when gfmr.tci = 0 sp36a/sp37a sp36a/sp37a sp17a sp16a 14 mpc8250 hardware speci?ations motorola electrical and thermal characteristics figure 5. scc/smc/spi/i 2 c external clock diagram figure 6 shows the scc/smc/spi/i 2 c internal clock. figure 6. scc/smc/spi/i 2 c internal clock diagram figure 7 shows tdm input and output signals. serial clkin scc/smc/spi/i2c input signals scc/smc/spi/i2c output signals sp18b sp19b sp38b/sp39b (see note.) (see note.) note : there are four possible timing conditions for scc and spi: 1. input sampled on the rising edge and output driven on the rising edge (shown). 2. input sampled on the rising edge and output driven on the falling edge. 3. input sampled on the falling edge and output driven on the falling edge. 4. input sampled on the falling edge and output driven on the rising edge. brg_out scc/smc/spi/i2c input signals scc/smc/spi/i2c output signals sp18a sp19a sp38a/sp39a (see note.) (see note.) note : there are four possible timing conditions for scc and spi: 1. input sampled on the rising edge and output driven on the rising edge (shown). 2. input sampled on the rising edge and output driven on the falling edge. 3. input sampled on the falling edge and output driven on the falling edge. 4. input sampled on the falling edge and output driven on the rising edge. motorola mpc8250 hardware speci?ations 15 electrical and thermal characteristics figure 7. tdm signal diagram figure 8 shows pio, timer, and dma signals. figure 8. pio, timer, and dma signal diagram table 9 lists siu input characteristics. serial clkin tdm input signals tdm output signals sp20 sp21 sp40/sp41 note : there are four possible tdm timing conditions: 1. input sampled on the rising edge and output driven on the rising edge (shown). 2. input sampled on the rising edge and output driven on the falling edge. 3. input sampled on the falling edge and output driven on the falling edge. 4. input sampled on the falling edge and output driven on the rising edge. sys clk pio/idma/timer[tgate assertion] input signals idma output signals sp22 sp23 sp42/sp43 timer(sp42/43)/ pio(sp42a/sp43a) sp42a/sp43a output signals sp42/sp43 timer input signal [tgate deassertion] sp22 sp23 note : tgate is asserted on the rising edge of the clock; it is deasserted on the falling edge. (see note) (see note) 16 mpc8250 hardware speci?ations motorola electrical and thermal characteristics table 10 lists siu output characteristics. note activating data pipelining (setting br x [dr] in the memory controller) improves the ac timing. when data pipelining is activated, sp12 can be used for data bus setup even when ecc or parity are used. also, sp33a can be used as the ac speci?ation for dp signals. figure 9 shows the interaction of several bus signals. table 9. ac characteristics for siu inputs 1 1 input speci?ations are measured from the 50% level of the signal to the 50% level of the rising edge of clkin. timings are measured at the pin. spec number characteristic setup (ns) hold (ns) max min 66 mhz 83 mhz 66 mhz 83 mhz sp11 sp10 aa ck /ar tr y /t a /ts /tea /dbg /bg /br 6 5 0.5 0.5 sp12 sp10 data bus in normal mode 5 4 0.5 0.5 sp13 sp10 data bus in ecc and parity modes 8 6 0.5 0.5 sp14 sp10 dp pins 7 6 0.5 0.5 sp15 sp10 all other pins 5 4 0.5 0.5 table 10. ac characteristics for siu outputs 1 1 output speci?ations are measured from the 50% level of the rising edge of clkin to the 50% level of the signal. timings are measured at the pin. spec number characteristic max delay (ns) min delay (ns) max min 66 mhz 83 mhz 66 mhz 83 mhz sp31 sp30 psd v al /tea /t a 7 6 0.5 0.5 sp32 sp30 add/add_atr./baddr/ci/gbl/wt 8 6.5 0.5 0.5 sp33a sp30 data bus 6.5 6.5 0.5 0.5 sp33b sp30 dp 8 7 0.5 0.5 sp34 sp30 memory controller signals/ale 6 5 0.5 0.5 sp35 sp30 all other signals 6 5.5 0.5 0.5 motorola mpc8250 hardware speci?ations 17 electrical and thermal characteristics figure 9. bus signals figure 10 shows signal behavior for all parity modes (including ecc, rmw parity, and standard parity). figure 10. parity mode diagram figure 11 shows signal behavior in memc mode. clkin aack /artry /ta /ts /tea / data bus normal mode all other input signals psd v al /tea /ta output signals add/add_atr/baddr/ci/ data bus output signals all other output signals sp11 sp12 sp15 sp10 sp10 sp10 sp30 sp30 sp30 sp30 sp32 sp33a sp35 dbg /bg /br input signals gbl/wt output signals sp31 input signal clkin data bus, ecc, and parity mode input signals dp mode input signal dp mode output signal sp13 sp10 sp14 sp10 sp33b/sp30 18 mpc8250 hardware speci?ations motorola electrical and thermal characteristics figure 11. memc mode diagram note generally, all mpc8250 bus and system output signals are driven from the rising edge of the input clock (clkin). memory controller signals, however, trigger on four points within a clkin cycle. each cycle is divided by four internal ticks: t1, t2, t3, and t4. t1 always occurs at the rising edge, and t3 at the falling edge, of clkin. however, the spacing of t2 and t4 depends on the pll clock ratio selected, as shown in table 11. figure 12 is a graphical representation of table 11. figure 12. internal tick spacing for memory controller signals note the upm machine outputs change on the internal tick determined by the memory controller programming; the ac speci?ations are relative to the internal tick. note that sdram and gpcm machine outputs change on clkin s rising edge. table 11. tick spacing for memory controller signals pll clock ratio tick spacing (t1 occurs at the rising edge of clkin) t2 t3 t4 1:2, 1:3, 1:4, 1:5, 1:6 1/4 clkin 1/2 clkin 3/4 clkin 1:2.5 3/10 clkin 1/2 clkin 8/10 clkin 1:3.5 4/14 clkin 1/2 clkin 11/14 clkin clkin v_clk memory controller signals sp34/sp30 clkin t1 t2 t3 t4 clkin t1 t2 t3 t4 for 1:2.5 for 1:3.5 clkin t1 t2 t3 t4 for 1:2, 1:3, 1:4, 1:5, 1:6 motorola mpc8250 hardware speci?ations 19 clock con?uration modes 1.3 clock con?uration modes the mpc8250 has three clocking modes: local, pci host, and pci agent. the clocking mode is set according to three input pins?ci_mode, pci_cfg[0], pci_modck?s shown in table 12. in each clocking mode, the con?uration of bus, core, pci, and cpm frequencies is determined by seven bits during the power-up reset?hree hardware con?uration pins (modck[1?]) and four bits from hardware con?uration word[28?1] (modck_h). both the plls and the dividers are set according to the selected mpc8250 clock operation mode as described in the following sections. note clock con?urations change only after por is asserted. 1.3.1 local bus mode table 13 shows the eight basic clock con?urations for the mpc8250. another 49 con?urations are available by using the con?uration pin (rstconf ) and driving four pins on the data bus. table 14 describes all possible clock con?urations when using the hard reset con?uration sequence. note also that basic modes are shown in boldface type. the frequencies listed are for the purpose of illustration only. users must select a mode and input bus frequency so that the resulting con?uration does not exceed the frequency rating of the user s device. table 12. mpc8250 clocking modes pins clocking mode pci clock frequency range (mhz) reference pci_mode pci_cfg[0] pci_modck 1 1 determines pci clock frequency range. refer to section 1.3.2, ?ci mode. 1 local bus table 13 and table 14 00 0 pci host 50?6 table 15 and table 16 0 0 1 25?0 01 0 pci agent 50?6 table 17 and table 18 0 1 1 25?0 table 13. clock default con?urations modck[1?] input clock frequency cpm multiplication factor cpm frequency core multiplication factor core frequency 000 33 mhz 3 100 mhz 4 133 mhz 001 33 mhz 3 100 mhz 5 166 mhz 010 33 mhz 4 133 mhz 4 133 mhz 011 33 mhz 4 133 mhz 5 166 mhz 100 66 mhz 2 133 mhz 2.5 166 mhz 101 66 mhz 2 133 mhz 3 200 mhz 110 66 mhz 2.5 166 mhz 2.5 166 mhz 111 66 mhz 2.5 166 mhz 3 200 mhz 20 mpc8250 hardware speci?ations motorola clock con?uration modes table 14. clock configuration modes 1 modck_h?odck[1?] input clock frequency 2,3 cpm multiplication factor 2 cpm frequency 2 core multiplication factor 2 core frequency 2 0001_000 33 mhz 2 66 mhz 4 133 mhz 0001_001 33 mhz 2 66 mhz 5 166 mhz 0001_010 33 mhz 2 66 mhz 6 200 mhz 0001_011 33 mhz 2 66 mhz 7 233 mhz 0001_100 33 mhz 2 66 mhz 8 266 mhz 0001_101 33 mhz 3 100 mhz 4 133 mhz 0001_110 33 mhz 3 100 mhz 5 166 mhz 0001_111 33 mhz 3 100 mhz 6 200 mhz 0010_000 33 mhz 3 100 mhz 7 233 mhz 0010_001 33 mhz 3 100 mhz 8 266 mhz 0010_010 33 mhz 4 133 mhz 4 133 mhz 0010_011 33 mhz 4 133 mhz 5 166 mhz 0010_100 33 mhz 4 133 mhz 6 200 mhz 0010_101 33 mhz 4 133 mhz 7 233 mhz 0010_110 33 mhz 4 133 mhz 8 266 mhz 0010_111 33 mhz 5 166 mhz 4 133 mhz 0011_000 33 mhz 5 166 mhz 5 166 mhz 0011_001 33 mhz 5 166 mhz 6 200 mhz 0011_010 33 mhz 5 166 mhz 7 233 mhz 0011_011 33 mhz 5 166 mhz 8 266 mhz 0011_100 33 mhz 6 200 mhz 4 133 mhz 0011_101 33 mhz 6 200 mhz 5 166 mhz 0011_110 33 mhz 6 200 mhz 6 200 mhz 0011_111 33 mhz 6 200 mhz 7 233 mhz 0100_000 33 mhz 6 200 mhz 8 266 mhz motorola mpc8250 hardware speci?ations 21 clock con?uration modes 0100_001 reserved 0100_010 0100_011 0100_100 0100_101 0100_110 0100_111 reserved 0101_000 0101_001 0101_010 0101_011 0101_100 0101_101 66 mhz 2 133 mhz 2 133 mhz 0101_110 66 mhz 2 133 mhz 2.5 166 mhz 0101_111 66 mhz 2 133 mhz 3 200 mhz 0110_000 66 mhz 2 133 mhz 3.5 233 mhz 0110_001 66 mhz 2 133 mhz 4 266 mhz 0110_010 66 mhz 2 133 mhz 4.5 300 mhz 0110_011 66 mhz 2.5 166 mhz 2 133 mhz 0110_100 66 mhz 2.5 166 mhz 2.5 166 mhz 0110_101 66 mhz 2.5 166 mhz 3 200 mhz 0110_110 66 mhz 2.5 166 mhz 3.5 233 mhz 0110_111 66 mhz 2.5 166 mhz 4 266 mhz 0111_000 66 mhz 2.5 166 mhz 4.5 300 mhz 0111_001 66 mhz 3 200 mhz 2 133 mhz 0111_010 66 mhz 3 200 mhz 2.5 166 mhz 0111_011 66 mhz 3 200 mhz 3 200 mhz 0111_100 66 mhz 3 200 mhz 3.5 233 mhz 0111_101 66 mhz 3 200 mhz 4 266 mhz 0111_110 66 mhz 3 200 mhz 4.5 300 mhz table 14. clock configuration modes 1 (continued) modck_h?odck[1?] input clock frequency 2,3 cpm multiplication factor 2 cpm frequency 2 core multiplication factor 2 core frequency 2 22 mpc8250 hardware speci?ations motorola clock con?uration modes 1.3.2 pci mode the pci mode is selected according to three input pins, as shown in table 12. in addition, note the following: note: pci_modck in pci mode only, pci_modck comes from the lgpl5 pin and modck_h[0?] comes from {lgpl0, lgpl1, lgpl2, lgpl3}. note: tval (output hold) the minimum tval = 2 when pci_modck = 1, and the minimum tval = 1 when pci_modck = 0. therefore, designers should use clock con?urations that ? this condition to achieve pci-compliant ac timing. note clock con?urations change only after por is asserted. 1.3.2.1 pci host mode the frequencies listed are for the purpose of illustration only. users must select a mode and input bus frequency so that the resulting con?uration does not exceed the frequency rating of the user s device. 0111_111 66 mhz 3.5 233 mhz 2 133 mhz 1000_000 66 mhz 3.5 233 mhz 2.5 166 mhz 1000_001 66 mhz 3.5 233 mhz 3 200 mhz 1000_010 66 mhz 3.5 233 mhz 3.5 233 mhz 1000_011 66 mhz 3.5 233 mhz 4 266 mhz 1000_100 66 mhz 3.5 233 mhz 4.5 300 mhz 1 because of speed dependencies, not all of the possible con?urations in table 14 are applicable. 2 the user should choose the input clock frequency and the multiplication factors such that the frequency of the cpu is equal to or greater than 133 mhz (150 mhz for extended temperature parts) and the cpm ranges between 66?33 mhz. 3 input clock frequency is given only for the purpose of reference. user should set modck_h?odck_l so that the resulting con?uration does not exceed the frequency rating of the user s part. table 14. clock configuration modes 1 (continued) modck_h?odck[1?] input clock frequency 2,3 cpm multiplication factor 2 cpm frequency 2 core multiplication factor 2 core frequency 2 motorola mpc8250 hardware speci?ations 23 clock con?uration modes table 16 describes all possible clock con?urations when using the mpc8250 s internal pci bridge in host mode. table 15. clock default con?urations in pci host mode (modck_hi = 0000) modck[1?] 1 1 assumes modck_hi = 0000. input clock frequency (bus) cpm multiplication factor cpm frequency core multiplication factor core frequency pci division factor 2 2 the frequency depends on the value of pci_modck. if pci_modck is high (logic ??, the pci frequency is divided by 2 (33 instead of 66 mhz, etc.) refer to table 12. pci frequency 2 000 66 mhz 2 133 mhz 2.5 166 mhz 2/4 66/33 mhz 001 66 mhz 2 133 mhz 3 200 mhz 2/4 66/33 mhz 010 66 mhz 2.5 166 mhz 3 200 mhz 3/6 55/28 mhz 011 66 mhz 2.5 166 mhz 3.5 233 mhz 3/6 55/28 mhz 100 66 mhz 2.5 166 mhz 4 266 mhz 3/6 55/28 mhz 101 66 mhz 3 200 mhz 3 200 mhz 3/6 66/33 mhz 110 66 mhz 3 200 mhz 3.5 233 mhz 3/6 66/33 mhz 111 66 mhz 3 200 mhz 4 266 mhz 3/6 66/33 mhz table 16. clock con?uration modes in pci host mode modck_h modck[1?] input clock frequency 1 (bus) cpm multiplication factor cpm frequency core multiplication factor core frequency pci division factor 2 pci frequency 2 0001_000 33 mhz 3 100 mhz 5 166 mhz 3/6 33/16 mhz 0001_001 33 mhz 3 100 mhz 6 200 mhz 3/6 33/16 mhz 0001_010 33 mhz 3 100 mhz 7 233 mhz 3/6 33/16 mhz 0001_011 33 mhz 3 100 mhz 8 266 mhz 3/6 33/16 mhz 0010_000 33 mhz 4 133 mhz 5 166 mhz 4/8 33/16 mhz 0010_001 33 mhz 4 133 mhz 6 200 mhz 4/8 33/16 mhz 0010_010 33 mhz 4 133 mhz 7 233 mhz 4/8 33/16 mhz 0010_011 33 mhz 4 133 mhz 8 266 mhz 4/8 33/16 mhz 0011_000 3 33 mhz 5 166 mhz 5 166 mhz 5 33 mhz 0011_001 3 33 mhz 5 166 mhz 6 200 mhz 5 33 mhz 0011_010 3 33 mhz 5 166 mhz 7 233 mhz 5 33 mhz 0011_011 3 33 mhz 5 166 mhz 8 266 mhz 5 33 mhz 0100_000 3 33 mhz 6 200 mhz 5 166 mhz 6 33 mhz 0100_001 3 33 mhz 6 200 mhz 6 200 mhz 6 33 mhz 0100_010 3 33 mhz 6 200 mhz 7 233 mhz 6 33 mhz 24 mpc8250 hardware speci?ations motorola clock con?uration modes 0100_011 3 33 mhz 6 200 mhz 8 266 mhz 6 33 mhz 0101_000 66 mhz 2 133 mhz 2.5 166 mhz 2/4 66/33 mhz 0101_001 66 mhz 2 133 mhz 3 200 mhz 2/4 66/33 mhz 0101_010 66 mhz 2 133 mhz 3.5 233 mhz 2/4 66/33 mhz 0101_011 66 mhz 2 133 mhz 4 266 mhz 2/4 66/33 mhz 0101_100 66 mhz 2 133 mhz 4.5 300 mhz 2/4 66/33 mhz 0110_000 66 mhz 2.5 166 mhz 2.5 166 mhz 3/6 55/28 mhz 0110_001 66 mhz 2.5 166 mhz 3 200 mhz 3/6 55/28 mhz 0110_010 66 mhz 2.5 166 mhz 3.5 233 mhz 3/6 55/28 mhz 0110_011 66 mhz 2.5 166 mhz 4 266 mhz 3/6 55/28 mhz 0110_100 66 mhz 2.5 166 mhz 4.5 300 mhz 3/6 55/28 mhz 0111_000 66 mhz 3 200 mhz 2.5 166 mhz 3/6 66/33 mhz 0111_001 66 mhz 3 200 mhz 3 200 mhz 3/6 66/33 mhz 0111_010 66 mhz 3 200 mhz 3.5 233 mhz 3/6 66/33 mhz 0111_011 66 mhz 3 200 mhz 4 266 mhz 3/6 66/33 mhz 0111_100 66 mhz 3 200 mhz 4.5 300 mhz 3/6 66/33 mhz 1000_000 66 mhz 3 200 mhz 2.5 166 mhz 4/8 50/25 mhz 1000_001 66 mhz 3 200 mhz 3 200 mhz 4/8 50/25 mhz 1000_010 66 mhz 3 200 mhz 3.5 233 mhz 4/8 50/25 mhz 1000_011 66 mhz 3 200 mhz 4 266 mhz 4/8 50/25 mhz 1000_100 66 mhz 3 200 mhz 4.5 300 mhz 4/8 50/25 mhz 1001_000 66 mhz 3.5 233 mhz 2.5 166 mhz 4/8 58/29 mhz 1001_001 66 mhz 3.5 233 mhz 3 200 mhz 4/8 58/29 mhz 1001_010 66 mhz 3.5 233 mhz 3.5 233 mhz 4/8 58/29 mhz 1001_011 66 mhz 3.5 233 mhz 4 266 mhz 4/8 58/29 mhz 1001_100 66 mhz 3.5 233 mhz 4.5 300 mhz 4/8 58/29 mhz 1010_000 100 mhz 2 200 mhz 2 200 mhz 3/6 66/33 mhz 1010_001 100 mhz 2 200 mhz 2.5 250 mhz 3/6 66/33 mhz table 16. clock con?uration modes in pci host mode (continued) modck_h modck[1?] input clock frequency 1 (bus) cpm multiplication factor cpm frequency core multiplication factor core frequency pci division factor 2 pci frequency 2 motorola mpc8250 hardware speci?ations 25 clock con?uration modes 1.3.2.2 pci agent mode the frequencies listed are for the purpose of illustration only. users must select a mode and input bus frequency so that the resulting con?uration does not exceed the frequency rating of the user s device. table 18 describes all possible clock con?urations when using the mpc8250 s internal pci bridge in agent mode. 1010_010 100 mhz 2 200 mhz 3 300 mhz 3/6 66/33 mhz 1010_011 100 mhz 2 200 mhz 3.5 350 mhz 3/6 66/33 mhz 1010_100 100 mhz 2 200 mhz 4 400 mhz 3/6 66/33 mhz 1011_000 100 mhz 2.5 250 mhz 2 200 mhz 4/8 62/31 mhz 1011_001 100 mhz 2.5 250 mhz 2.5 250 mhz 4/8 62/31mhz 1011_010 100 mhz 2.5 250 mhz 3 300 mhz 4/8 62/31 mhz 1011_011 100 mhz 2.5 250 mhz 3.5 350 mhz 4/8 62/31 mhz 1011_100 100 mhz 2.5 250 mhz 4 400 mhz 4/8 62/31 mhz 1 input clock frequency is given only for the purpose of reference. user should set modck_h?odck_l so that the resulting con?uration does not exceed the frequency rating of the user s part. 2 the frequency depends on the value of pci_modck. if pci_modck is high (logic ??, the pci frequency is divided by 2 (33 instead of 66 mhz, etc.). refer to table 12 3 in this mode, pci_modck must be ?? table 17. clock default con?urations in pci agent mode (modck_hi = 0000) modck[1?] 1 1 assumes modck_hi = 0000. input clock frequency (pci) 2 cpm multiplication factor 2 2 the frequency depends on the value of pci_modck. if pci_modck is high (logic ??, the pci frequency is divided by 2 (33 instead of 66 mhz, etc.) and the cpm multiplication factor is multiplied by 2. refer to table 12 cpm frequency core multiplication factor core frequency 3 3 core frequency = (60x bus frequency)(core multiplication factor) bus division factor 60x bus frequency 4 4 bus frequency = cpm frequency / bus division factor 000 66/33 mhz 2/4 133 mhz 2.5 166 mhz 2 66 mhz 001 66/33 mhz 2/4 133 mhz 3 200 mhz 2 66 mhz 010 66/33 mhz 3/6 200 mhz 3 200 mhz 3 66 mhz 011 66/33 mhz 3/6 200 mhz 4 266 mhz 3 66 mhz 100 66/33 mhz 3/6 200 mhz 3 240 mhz 2.5 80 mhz 101 66/33 mhz 3/6 200 mhz 3.5 280 mhz 2.5 80 mhz 110 66/33 mhz 4/8 266 mhz 3.5 300 mhz 3 88 mhz 111 66/33 mhz 4/8 266 mhz 3 300 mhz 2.5 100 mhz table 16. clock con?uration modes in pci host mode (continued) modck_h modck[1?] input clock frequency 1 (bus) cpm multiplication factor cpm frequency core multiplication factor core frequency pci division factor 2 pci frequency 2 26 mpc8250 hardware speci?ations motorola clock con?uration modes table 18. clock con?uration modes in pci agent mode modck_h ? modck[1?] input clock frequency (pci) 1,2 cpm multiplication factor 1 cpm frequency core multiplication factor core frequency 3 bus division factor 60x bus frequency 4 0001_001 66/33 mhz 2/4 133 mhz 5 166 mhz 4 33 mhz 0001_010 66/33 mhz 2/4 133 mhz 6 200 mhz 4 33 mhz 0001_011 66/33 mhz 2/4 133 mhz 7 233 mhz 4 33 mhz 0001_100 66/33 mhz 2/4 133 mhz 8 266 mhz 4 33 mhz 0010_001 50/25 mhz 3/6 150 mhz 3 180 mhz 2.5 60 mhz 0010_010 50/25 mhz 3/6 150 mhz 3.5 210 mhz 2.5 60 mhz 0010_011 50/25 mhz 3/6 150 mhz 4 240 mhz 2.5 60 mhz 0010_100 50/25 mhz 3/6 150 mhz 4.5 270 mhz 2.5 60 mhz 0011_000 66/33 mhz 2/4 133 mhz 2.5 110mhz 3 44 mhz 0011_001 66/33 mhz 2/4 133 mhz 3 132 mhz 3 44 mhz 0011_010 66/33 mhz 2/4 133 mhz 3.5 154 mhz 3 44 mhz 0011_011 66/33 mhz 2/4 133 mhz 4 176mhz 3 44 mhz 0011_100 66/33 mhz 2/4 133 mhz 4.5 198 mhz 3 44 mhz 0100_000 66/33 mhz 3/6 200 mhz 2.5 166 mhz 3 66 mhz 0100_001 66/33 mhz 3/6 200 mhz 3 200 mhz 366 mhz 0100_010 66/33 mhz 3/6 200 mhz 3.5 233 mhz 366 mhz 0100_011 66/33 mhz 3/6 200 mhz 4 266 mhz 366 mhz 0100_100 66/33 mhz 3/6 200 mhz 4.5 300 mhz 366 mhz 0101_000 5 33 mhz 5 166 mhz 2.5 166 mhz 2.5 66 mhz 0101_001 5 33 mhz 5 166 mhz 3 200 mhz 2.5 66 mhz 0101_010 5 33 mhz 5 166 mhz 3.5 233 mhz 2.5 66 mhz 0101_011 5 33 mhz 5 166 mhz 4 266 mhz 2.5 66 mhz 0101_100 5 33 mhz 5 166 mhz 4.5 300 mhz 2.5 66 mhz 0110_000 50/25 mhz 4/8 200 mhz 2.5 166 mhz 3 66 mhz 0110_001 50/25 mhz 4/8 200 mhz 3 200 mhz 3 66 mhz 0110_010 50/25 mhz 4/8 200 mhz 3.5 233 mhz 3 66 mhz 0110_011 50/25 mhz 4/8 200 mhz 4 266 mhz 3 66 mhz 0110_100 50/25 mhz 4/8 200 mhz 4.5 300 mhz 3 66 mhz motorola mpc8250 hardware speci?ations 27 clock con?uration modes 0111_000 66/33 mhz 3/6 200 mhz 2 200 mhz 2 100 mhz 0111_001 66/33 mhz 3/6 200 mhz 2.5 250 mhz 2 100 mhz 0111_010 66/33 mhz 3/6 200 mhz 3 300 mhz 2 100 mhz 0111_011 66/33 mhz 3/6 200 mhz 3.5 350 mhz 2 100 mhz 1000_000 66/33 mhz 3/6 200 mhz 2 160 mhz 2.5 80 mhz 1000_001 66/33 mhz 3/6 200 mhz 2.5 200 mhz 2.5 80 mhz 1000_010 66/33 mhz 3/6 200 mhz 3 240 mhz 2.5 80 mhz 1000_011 66/33 mhz 3/6 200 mhz 3.5 280 mhz 2.5 80 mhz 1000_100 66/33 mhz 3/6 200 mhz 4 320 mhz 2.5 80 mhz 1000_101 66/33 mhz 3/6 200 mhz 4.5 360 mhz 2.5 80 mhz 1001_000 66/33 mhz 4/8 266 mhz 2.5 166 mhz 4 66 mhz 1001_001 66/33 mhz 4/8 266 mhz 3 200 mhz 4 66 mhz 1001_010 66/33 mhz 4/8 266 mhz 3.5 233 mhz 4 66 mhz 1001_011 66/33 mhz 4/8 266 mhz 4 266 mhz 4 66 mhz 1001_100 66/33 mhz 4/8 266 mhz 4.5 300 mhz 4 66 mhz 1010_000 66/33 mhz 4/8 266 mhz 2.5 222 mhz 3 88 mhz 1010_001 66/33 mhz 4/8 266 mhz 3 266 mhz 3 88 mhz 1010_010 66/33 mhz 4/8 266 mhz 3.5 300 mhz 3 88 mhz 1010_011 66/33 mhz 4/8 266 mhz 4 350 mhz 3 88 mhz 1010_100 66/33 mhz 4/8 266 mhz 4.5 400 mhz 3 88 mhz 1011_000 66/33 mhz 4/8 266 mhz 2 212mhz 2.5 106 mhz 1011_001 66/33 mhz 4/8 266 mhz 2.5 265 mhz 2.5 106 mhz 1011_010 66/33 mhz 4/8 266 mhz 3 318 mhz 2.5 106 mhz 1011_011 66/33 mhz 4/8 266 mhz 3.5 371 mhz 2.5 106 mhz 1011_100 66/33 mhz 4/8 266 mhz 4 424 mhz 2.5 106 mhz 1 the frequency depends on the value of pci_modck. if pci_modck is high (logic ??, the pci frequency is divided by 2 (33 instead of 66 mhz, etc.) and the cpm multiplication factor is multiplied by 2. refer to table 12 2 input clock frequency is given only for the purpose of reference. user should set modck_h?odck_l so that the resulting con?uration does not exceed the frequency rating of the user s part. 3 core frequency = (60x bus frequency)(core multiplication factor) 4 bus frequency = cpm frequency / bus division factor 5 in this mode, pci_modck must be ?? table 18. clock con?uration modes in pci agent mode (continued) modck_h ? modck[1?] input clock frequency (pci) 1,2 cpm multiplication factor 1 cpm frequency core multiplication factor core frequency 3 bus division factor 60x bus frequency 4 28 mpc8250 hardware speci?ations motorola pinout 1.4 pinout this section provides the pin assignments and pinout list for the mpc8250. 1.4.1 zu package the following ?ures and table represent the standard 480 tbga package. for information on the alternate package, refer to section 1.4.2, ?r package?on page 40. 1.4.1.1 zu pin assignments figure 13 shows the pinout of the zu package as viewed from the top surface. figure 13. pinout of the 480 tbga package as viewed from the top surface 1 2 3 4 5 6 7 8 910111213141516 17 18 19 20 21 22 23 24 25 26 27 28 29 not to scale 1 2 3 4 5 6 7 8 9 10111213 141516171819202122 2324 2526272829 a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af ag ah aj a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af ag ah aj motorola mpc8250 hardware speci?ations 29 pinout figure 14 shows the side pro?e of the tbga package to indicate the direction of the top surface view. figure 14. side view of the tbga package table 19 shows the pinout list of the zu package of the mpc8250. table 20 de?es conventions and acronyms used in table 19. table 19. mpc8250 zu package pinout list pin name ball br w5 bg f4 abb /irq2 e2 ts e3 a0 g1 a1 h5 a2 h2 a3 h1 a4 j5 a5 j4 a6 j3 a7 j2 a8 j1 a9 k4 a10 k3 a11 k2 a12 k1 a13 l5 a14 l4 a15 l3 a16 l2 a17 l1 a18 m5 soldermask copper traces die copper heat spreader (oxidized for insulation) 1.27 mm pitch glob-top dam etched pressure sensitive die glob-top filled area polymide tape cavity adhesive attach view 30 mpc8250 hardware speci?ations motorola pinout a19 n5 a20 n4 a21 n3 a22 n2 a23 n1 a24 p4 a25 p3 a26 p2 a27 p1 a28 r1 a29 r3 a30 r5 a31 r4 tt0 f1 tt1 g4 tt2 g3 tt3 g2 tt4 f2 tbst d3 tsiz0 c1 tsiz1 e4 tsiz2 d2 tsiz3 f5 aa ck f3 ar tr y e1 dbg v1 dbb /irq3 v2 d0 b20 d1 a18 d2 a16 d3 a13 d4 e12 d5 d9 d6 a6 d7 b5 table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 31 pinout d8 a20 d9 e17 d10 b15 d11 b13 d12 a11 d13 e9 d14 b7 d15 b4 d16 d19 d17 d17 d18 d15 d19 c13 d20 b11 d21 a8 d22 a5 d23 c5 d24 c19 d25 c17 d26 c15 d27 d13 d28 c11 d29 b8 d30 a4 d31 e6 d32 e18 d33 b17 d34 a15 d35 a12 d36 d11 d37 c8 d38 e7 d39 a3 d40 d18 d41 a17 d42 a14 table 19. mpc8250 zu package pinout list (continued) pin name ball 32 mpc8250 hardware speci?ations motorola pinout d43 b12 d44 a10 d45 d8 d46 b6 d47 c4 d48 c18 d49 e16 d50 b14 d51 c12 d52 b10 d53 a7 d54 c6 d55 d5 d56 b18 d57 b16 d58 e14 d59 d12 d60 c10 d61 e8 d62 d6 d63 c2 dp0/rsr v /ext_br2 b22 irq1 /dp1/ext_bg2 a22 irq2 /dp2/tlbisync /ext_dbg2 e21 irq3 /dp3/ckstp_out /ext_br3 d21 irq4 /dp4/core_sreset /ext_bg3 c21 irq5 /dp5/tben /ext_dbg3 b21 irq6 /dp6/cse0 a21 irq7 /dp7/cse1 e20 psd v al v3 t a c22 tea v5 gbl /irq1 w1 ci /baddr29/irq2 u2 wt /baddr30/irq3 u3 table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 33 pinout l2_hit /irq4 y4 cpu_bg /baddr31/irq5 u4 cpu_dbg r2 cpu_br y3 cs0 f25 cs1 c29 cs2 e27 cs3 e28 cs4 f26 cs5 f27 cs6 f28 cs7 g25 cs8 d29 cs9 e29 cs10 /bctl1 f29 cs11 /ap0 g28 baddr27 t5 baddr28 u1 ale t2 bctl0 a27 pwe0 /psddqm0 /pbs0 c25 pwe1 /psddqm1 /pbs1 e24 pwe2 /psddqm2 /pbs2 d24 pwe3 /psddqm3 /pbs3 c24 pwe4 /psddqm4 /pbs4 b26 pwe5 /psddqm5 /pbs5 a26 pwe6 /psddqm6 /pbs6 b25 pwe7 /psddqm7 /pbs7 a25 psda10/pgpl0 e23 psd we /pgpl1 b24 poe /psdras /pgpl2 a24 psdcas /pgpl3 b23 pgt a /pupmwait/pgpl4/ppbs a23 psdamux/pgpl5 d22 l we0 /lsddqm0 /lbs0 /pci_cfg0 h28 table 19. mpc8250 zu package pinout list (continued) pin name ball 34 mpc8250 hardware speci?ations motorola pinout l we1 /lsddqm1 /lbs1 /pci_cfg1 h27 l we2 /lsddqm2 /lbs2 /pci_cfg2 h26 l we3 /lsddqm3 /lbs3 /pci_cfg3 g29 lsda10/lgpl0/pci_modckh0 d27 lsd we /lgpl1/pci_modckh1 c28 loe /lsdras /lgpl2/pci_modckh2 e26 lsdcas /lgpl3/pci_modckh3 d25 lgt a /lupmwait/lgpl4/lpbs c26 lgpl5/lsdamux/pci_modck b27 l wr d28 l_a14/par n27 l_a15/frame /smi t29 l_a16/trd y r27 l_a17/ird y /ckstp_out r26 l_a18/st op r29 l_a19/devsel r28 l_a20/idsel w29 l_a21/perr p28 l_a22/serr n26 l_a23/req0 aa27 l_a24/req1 /hsejsw p29 l_a25/gnt0 aa26 l_a26/gnt1 /hsled n25 l_a27/gnt2 /hsenum aa25 l_a28/rst /core_sreset ab29 l_a29/int a ab28 l_a30/req2 p25 l_a31/dllout ab27 lcl_d0/ad0 h29 lcl_d1/ad1 j29 lcl_d2/ad2 j28 lcl_d3/ad3 j27 lcl_d4/ad4 j26 lcl_d5/ad5 j25 lcl_d6/ad6 k25 table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 35 pinout lcl_d7/ad7 l29 lcl_d8/ad8 l27 lcl_d9/ad9 l26 lcl_d10/ad10 l25 lcl_d11/ad11 m29 lcl_d12/ad12 m28 lcl_d13/ad13 m27 lcl_d14/ad14 m26 lcl_d15/ad15 n29 lcl_d16/ad16 t25 lcl_d17/ad17 u27 lcl_d18/ad18 u26 lcl_d19/ad19 u25 lcl_d20/ad20 v29 lcl_d21/ad21 v28 lcl_d22/ad22 v27 lcl_d23/ad23 v26 lcl_d24/ad24 w27 lcl_d25/ad25 w26 lcl_d26/ad26 w25 lcl_d27/ad27 y29 lcl_d28/ad28 y28 lcl_d29/ad29 y25 lcl_d30/ad30 aa29 lcl_d31/ad31 aa28 lcl_dp0/c0/be0 l28 lcl_dp1/c1/be1 n28 lcl_dp2/c2/be2 t28 lcl_dp3/c3/be3 w28 irq0 /nmi_out t1 irq7 /int_out /ape d1 trst ah3 tck ag5 tms aj3 tdi ae6 table 19. mpc8250 zu package pinout list (continued) pin name ball 36 mpc8250 hardware speci?ations motorola pinout tdo af5 tris ab4 poreset ag6 hreset ah5 sreset af6 qreq aa3 rstconf aj4 modck1/ap1/tc0/bnksel0 w2 modck2/ap2/tc1/bnksel1 w3 modck3/ap3/tc2/bnksel2 w4 xfc ab2 clkin1 ah4 pa0/rest ar t1 /dreq3 ac29 1 pa1/reject1 /done3 ac25 1 pa2/clk20/d a ck3 ae28 1 pa3/clk19/d a ck4 /l1rxd1a2 ag29 1 pa4/reject2 /done4 ag28 1 pa5/rest ar t2 /dreq4 ag26 1 pa 6 ae24 1 pa7/smsyn2 ah25 1 pa8/smrxd2 af23 1 pa9/smtxd2 ah23 1 pa10/msnum5 ae22 1 pa11/msnum4 ah22 1 pa12/msnum3 aj21 1 pa13/msnum2 ah20 1 pa14/fcc1_rxd3 ag19 1 pa15/fcc1_rxd2 af18 1 pa16/fcc1_rxd1 af17 1 pa17/fcc1_rxd0/fcc1_rxd ae16 1 pa18/fcc1_txd0/fcc1_txd aj16 1 pa19/fcc1_txd1 ag15 1 pa20/fcc1_txd2 aj13 1 pa21/fcc1_txd3 ae13 1 pa22 af12 1 table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 37 pinout pa23 ag11 1 pa24/msnum1 ah9 1 pa25/msnum0 aj8 1 pa26/fcc1_mii_rx_er ah7 1 pa27/fcc1_mii_rx_dv af7 1 pa28/fcc1_mii_tx_en ad5 1 pa29/fcc1_mii_tx_er af1 1 pa30/fcc1_mii_crs/fcc1_r ts ad3 1 pa31/fcc1_mii_col ab5 1 pb4/fcc3_txd3/l1rsynca2/fcc3_r ts ad28 1 pb5/fcc3_txd2/l1tsynca2/l1gnta2 ad26 1 pb6/fcc3_txd1/l1rxda2/l1rxd0a2 ad25 1 pb7/fcc3_txd0/fcc3_txd/l1txda2/l1txd0a2 ae26 1 pb8/fcc3_rxd0/fcc3_rxd/txd3 ah27 1 pb9/fcc3_rxd1/l1txd2a2 ag24 1 pb10/fcc3_rxd2 ah24 1 pb11/fcc3_rxd3 aj24 1 pb12/fcc3_mii_crs/txd2 ag22 1 pb13/fcc3_mii_col/l1txd1a2 ah21 1 pb14/fcc3_mii_tx_en/rxd3 ag20 1 pb15/fcc3_mii_tx_er/rxd2 af19 1 pb16/fcc3_mii_rx_er/clk18 aj18 1 pb17/fcc3_mii_rx_dv/clk17 aj17 1 pb18/fcc2_rxd3/l1clkod2/l1rxd2a2 ae14 1 pb19/fcc2_rxd2/l1rqd2/l1rxd3a2 af13 1 pb20/fcc2_rxd1/l1rsyncd2/l1txd1a1 ag12 1 pb21/fcc2_rxd0/fcc2_rxd/l1tsyncd2/l1gntd2 ah11 1 pb22/fcc2_txd0/fcc2_txd/l1rxdd2 ah16 1 pb23/fcc2_txd1/l1txdd2 ae15 1 pb24/fcc2_txd2/l1rsyncc2 aj9 1 pb25/fcc2_txd3/l1tsyncc2/l1gntc2 ae9 1 pb26/fcc2_mii_crs/l1rxdc2 aj7 1 pb27/fcc2_mii_col/l1txdc2 ah6 1 pb28/fcc2_mii_rx_er/fcc2_r ts /l1tsyncb2/l1gntb2/txd1 ae3 1 pb29/l1rsyncb2/fcc2_mii_tx_en ae2 1 table 19. mpc8250 zu package pinout list (continued) pin name ball 38 mpc8250 hardware speci?ations motorola pinout pb30/fcc2_mii_rx_dv/l1rxdb2 ac5 1 pb31/fcc2_mii_tx_er/l1txdb2 ac4 1 pc0/dreq1/brgo7/smsyn2 /l1clkoa2 ab26 1 pc1/dreq2/brgo6/l1rqa2 ad29 1 pc2/fcc3_cd /done2 ae29 1 pc3/fcc3_cts /d a ck2 /cts4 ae27 1 pc4/si2_l1st4/fcc2_cd af27 1 pc5/si2_l1st3/fcc2_cts af24 1 pc6/fcc1_cd aj26 1 pc7/fcc1_cts aj25 1 pc8/cd4 /rena4/si2_l1st2/cts3 af22 1 pc9/cts4 /clsn4/si2_l1st1/l1tsynca2/l1gnta2 ae21 1 pc10/cd3 /rena3 af20 1 pc11/cts3 /clsn3/l1txd3a2 ae19 1 pc12/cd2 /rena2 ae18 1 pc13/cts2 /clsn2 ah18 1 pc14/cd1 /rena1 ah17 1 pc15/cts1 /clsn1/smtxd2 ag16 1 pc16/clk16/tin4 af15 1 pc17/clk15/tin3/brgo8 aj15 1 pc18/clk14/tga te2 ah14 1 pc19/clk13/brgo7/spiclk ag13 1 pc20/clk12/tga te1 ah12 1 pc21/clk11/brgo6 aj11 1 pc22/clk10/done1 ag10 1 pc23/clk9/brgo5/d a ck1 ae10 1 pc24/clk8/t out4 af9 1 pc25/clk7/brgo4 ae8 1 pc26/clk6/t out3 /tmclk aj6 1 pc27/fcc3_txd/fcc3_txd0/clk5/brgo3 ag2 1 pc28/clk4/tin1/t out2 /cts2 /clsn2 af3 1 pc29/clk3/tin2/brgo2/cts1 /clsn1 af2 1 pc30/clk2/t out1 ae1 1 pc31/clk1/brgo1 ad1 1 pd4/brgo8/fcc3_r ts /smrxd2 ac28 1 table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 39 pinout pd5/done1 ad27 1 pd6/d a ck1 af29 1 pd7/smsyn1fcc1_txclav2 af28 1 pd8/smrxd1/brgo5 ag25 1 pd9/smtxd1/brgo3 ah26 1 pd10/l1clkob2/brgo4 aj27 1 pd11/l1rqb2 aj23 1 pd12 ag23 1 pd13 aj22 1 pd14/l1clkoc2/i2cscl ae20 1 pd15/l1rqc2 /i2csda aj20 1 pd16/spimiso ag18 1 pd17/brgo2/spimosi ag17 1 pd18/spiclk af16 1 pd19/spisel/brgo ah15 1 pd20/r ts4 /tena4/l1rsynca2 aj14 1 pd21/txd4/l1rxd0a2/l1rxda2 ah13 1 pd22/rxd4/l1txd0a2/l1txda2 aj12 1 pd23/r ts3 /tena3 ae12 1 pd24/txd3 af10 1 pd25/rxd3 ag9 1 pd26/r ts2 /tena2 ah8 1 pd27/txd2 ag7 1 pd28/rxd2 ae4 1 pd29/r ts1 /tena1 ag1 1 pd30/txd1 ad4 1 pd31/rxd1 ad2 1 vccsyn ab3 vccsyn1 b9 gndsyn ab1 clkin2 ae11 spare4 2 u5 pci_mode 3 af25 spare6 2 v4 thermal0 4 aa1 table 19. mpc8250 zu package pinout list (continued) pin name ball 40 mpc8250 hardware speci?ations motorola pinout symbols used in table 19 are described in table 20. 1.4.2 vr package the following ?ures and table represent the alternate 516 pbga package. for information on the standard package for the mpc8250, refer to section 1.4.1, ?u package?on page 28. 1.4.2.1 vr pin assignments figure 15 shows the pinout of the vr package as viewed from the top surface. thermal1 4 ag4 i/o power ag21, ag14, ag8, aj1, aj2, ah1, ah2, ag3, af4, ae5, ac27, y27, t27, p27, k26, g27, ae25, af26, ag27, ah28, ah29, aj28, aj29, c7, c14, c16, c20, c23, e10, a28, a29, b28, b29, c27, d26, e25, h3, m4, t3, aa4, a1, a2, b1, b2, c3, d4, e5 core power u28, u29, k28, k29, a9, a19, b19, m1, m2, y1, y2, ac1, ac2, ah19, aj19, ah10, aj10, aj5 ground aa5, af21, af14, af8, ae7, af11, ae17, ae23, ac26, ab25, y26, v25, t26, r25, p26, m25, k27, h25, g26, d7, d10, d14, d16, d20, d23, c9, e11, e13, e15, e19, e22, b3, g5, h4, k5, m3, p5, t4, y5, aa2, ac3 1 the default con?uration of the cpm pins (pa[0?1], pb[4?1], pc[0?1], pd[4?1]) is input. to prevent excessive dc current, it is recommended to either pull unused pins to gnd or vddh, or to con?ure them as outputs. 2 must be pulled down or left ?ating. 3 if pci is not desired, this pin should be pulled up or left ?ating. 4 for information on how to use this pin, refer to mpc8260 powerquicc ii thermal resistor guide (an2271/d) available at www.motorola.com/semiconductors. table 20. symbol legend symbol meaning o verbar signals with overbars, such as t a , are active low. mii indicates that a signal is part of the media independent interface. table 19. mpc8250 zu package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 41 pinout figure 15. pinout of the 516 pbga package (view from top) figure 16 shows the side pro?e of the pbga package to indicate the direction of the top surface view. figure 16. side view of the pbga package table 21 shows the pinout list of the mpc8250vr. table 20 de?es conventions and acronyms used in table 21. 1 2345678910111213141516 17 18 19 20 21 22 23 24 25 26 not to scale 1 234567891011121314151617181920212223242526 a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af die transfer molding compound 1 mm pitch wire bonds attach die ball bond screen-printed solder mask cu substrate traces bt resin glass epoxy plated substrate via 42 mpc8250 hardware speci?ations motorola pinout table 21. mpc8250 vr package pinout list pin name ball br c16 bg d2 abb /irq2 c1 ts d1 a0 d5 a1 e8 a2 c4 a3 b4 a4 a4 a5 d7 a6 d8 a7 c6 a8 b5 a9 b6 a10 c7 a11 c8 a12 a6 a13 d9 a14 f11 a15 b7 a16 b8 a17 c9 a18 a7 a19 b9 a20 e11 a21 a8 a22 d11 a23 b10 a24 c11 a25 a9 a26 b11 a27 c12 a28 d12 a29 a10 a30 b12 motorola mpc8250 hardware speci?ations 43 pinout a31 b13 tt0 e7 tt1 b3 tt2 f8 tt3 a3 tt4 c3 tbst f5 tsiz0 e3 tsiz1 e2 tsiz2 e1 tsiz3 e4 aa ck d3 ar tr y c2 dbg a14 dbb /irq3 c15 d0 w4 d1 y1 d2 v1 d3 p4 d4 n3 d5 k5 d6 j4 d7 g1 d8 ab1 d9 u4 d10 u2 d11 n6 d12 n1 d13 l1 d14 j5 d15 g3 d16 aa2 d17 w1 d18 t3 d19 t1 table 21. mpc8250 vr package pinout list (continued) pin name ball 44 mpc8250 hardware speci?ations motorola pinout d20 m2 d21 k2 d22 j1 d23 g4 d24 u5 d25 t5 d26 p5 d27 p3 d28 m3 d29 k3 d30 h2 d31 g5 d32 aa1 d33 v2 d34 u1 d35 p2 d36 m4 d37 k4 d38 h3 d39 f2 d40 y2 d41 u3 d42 t2 d43 n2 d44 m5 d45 k1 d46 h4 d47 f1 d48 w2 d49 t4 d50 r3 d51 n4 d52 m1 d53 j2 d54 h5 table 21. mpc8250 vr package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 45 pinout d55 f3 d56 v3 d57 r5 d58 r2 d59 n5 d60 l2 d61 j3 d62 h1 d63 f4 dp0/rsr v /ext_br2 ab3 irq1 /dp1/ext_bg2 w5 irq2 /dp2/tlbisync /ext_dbg2 ac2 irq3 /dp3/ckstp_out /ext_br3 aa3 irq4 /dp4/core_sreset /ext_bg3 ad1 irq5 /dp5/tben /ext_dbg3 ac1 irq6 /dp6/cse0 ab2 irq7 /dp7/cse1 y3 psd v al d15 t a y4 tea d16 gbl /irq1 e15 ci /baddr29/irq2 d14 wt /baddr30/irq3 e14 l2_hit /irq4 a17 cpu_bg /baddr31/irq5 b14 cpu_dbg f13 cpu_br b17 cs0 ac6 cs1 ad6 cs2 ae6 cs3 ab7 cs4 af7 cs5 ac7 cs6 ad7 cs7 af8 table 21. mpc8250 vr package pinout list (continued) pin name ball 46 mpc8250 hardware speci?ations motorola pinout cs8 ae8 cs9 ad8 cs10 /bctl1 ac8 cs11 /ap0 ab8 baddr27 c13 baddr28 a12 ale d13 bctl0 af4 pwe0 /psddqm0 /pbs0 aa5 pwe1 /psddqm1 /pbs1 ae4 pwe2 /psddqm2 /pbs2 ad4 pwe3 /psddqm3 /pbs3 af3 pwe4 /psddqm4 /pbs4 ab4 pwe5 /psddqm5 /pbs5 ae3 pwe6 /psddqm6 /pbs6 af2 pwe7 /psddqm7 /pbs7 ad3 psda10/pgpl0 ae2 psd we /pgpl1 ad2 poe /psdras /pgpl2 ae1 psdcas /pgpl3 ac3 pgt a /pupmwait/pgpl4/ppbs w6 psdamux/pgpl5 aa4 l we0 /lsddqm0 /lbs0 /pci_cfg0 ac9 l we1 /lsddqm1 /lbs1 /pci_cfg1 ad9 l we2 /lsddqm2 /lbs2 /pci_cfg2 ae9 l we3 /lsddqm3 /lbs3 /pci_cfg3 af9 lsda10/lgpl0/pci_modckh0 ab6 lsd we /lgpl1/pci_modckh1 af5 loe /lsdras /lgpl2/pci_modckh2 ae5 lsdcas /lgpl3/pci_modckh3 ad5 lgt a /lupmwait/lgpl4/lpbs ac5 lgpl5/lsdamux/pci_modck ab5 l wr af6 l_a14/par ae13 l_a15/frame /smi ad15 table 21. mpc8250 vr package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 47 pinout l_a16/trd y af16 l_a17/ird y /ckstp_out af15 l_a18/st op ae15 l_a19/devsel ae14 l_a20/idsel ac17 l_a21/perr ad14 l_a22/serr af13 l_a23/req0 ae20 l_a24/req1 /hsejsw ac14 l_a25/gnt0 ac19 l_a26/gnt1 /hsled ad13 l_a27/gnt2 /hsenum af21 l_a28/rst /core_sreset af22 l_a29/int a ae21 l_a30/req2 ab14 l_a31/dllout ad20 lcl_d0/ad0 ab9 lcl_d1/ad1 ab10 lcl_d2/ad2 ac10 lcl_d3/ad3 ad10 lcl_d4/ad4 ae10 lcl_d5/ad5 af10 lcl_d6/ad6 af11 lcl_d7/ad7 ab12 lcl_d8/ad8 ab11 lcl_d9/ad9 af12 lcl_d10/ad10 ae11 lcl_d11/ad11 ac13 lcl_d12/ad12 ac12 lcl_d13/ad13 ab13 lcl_d14/ad14 ad12 lcl_d15/ad15 af14 lcl_d16/ad16 af17 lcl_d17/ad17 ae16 lcl_d18/ad18 ad16 table 21. mpc8250 vr package pinout list (continued) pin name ball 48 mpc8250 hardware speci?ations motorola pinout lcl_d19/ad19 ac16 lcl_d20/ad20 ab16 lcl_d21/ad21 af18 lcl_d22/ad22 ae17 lcl_d23/ad23 ad17 lcl_d24/ad24 ab17 lcl_d25/ad25 ae18 lcl_d26/ad26 ad18 lcl_d27/ad27 ac18 lcl_d28/ad28 ae19 lcl_d29/ad29 af20 lcl_d30/ad30 ad19 lcl_d31/ad31 ab18 lcl_dp0/c0/be0 ae12 lcl_dp1/c1/be1 aa13 lcl_dp2/c2/be2 ac15 lcl_dp3/c3/be3 af19 irq0 /nmi_out a11 irq7 /int_out /ape e5 trst f22 tck a24 tms c24 tdi a25 tdo b24 tris c19 poreset b25 hreset d24 sreset e23 qreq d18 rstconf e24 modck1/ap1/tc0/bnksel0 b16 modck2/ap2/tc1/bnksel1 f16 modck3/ap3/tc2/bnksel2 a15 xfc a18 clkin1 g22 table 21. mpc8250 vr package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 49 pinout pa0/rest ar t1 /dreq3 ac20 1 pa1/reject1 /done3 ac21 1 pa2/clk20/d a ck3 af25 1 pa3/clk19/d a ck4 /l1rxd1a2 ae24 1 pa4/reject2 /done4 aa21 1 pa5/rest ar t2 /dreq4 ad25 1 pa 6 ac24 1 pa7/smsyn2 aa22 1 pa8/smrxd2 aa23 1 pa9/smtxd2 y26 1 pa10/msnum5 w22 1 pa11/msnum4 w23 1 pa12/msnum3 v26 1 pa13/msnum2 v25 1 pa14/fcc1_rxd3 t22 1 pa15/fcc1_rxd2 t25 1 pa16/fcc1_rxd1 r24 1 pa17/fcc1_rxd0/fcc1_rxd p22 1 pa18/fcc1_txd0/fcc1_txd n26 1 pa19/fcc1_txd1 n23 1 pa20/fcc1_txd2 k26 1 pa21/fcc1_txd3 l23 1 pa22 k23 1 pa23 h26 1 pa24/msnum1 f25 1 pa25/msnum0 d26 1 pa26/fcc1_mii_rx_er d25 1 pa27/fcc1_mii_rx_dv c25 1 pa28/fcc1_mii_tx_en c22 1 pa29/fcc1_mii_tx_er b21 1 pa30/fcc1_mii_crs/fcc1_r ts a20 1 pa31/fcc1_mii_col a19 1 pb4/fcc3_txd3/l1rsynca2/ fcc3_r ts ad21 1 pb5/fcc3_txd2/l1tsynca2/ l1gnta2 ad22 1 pb6/fcc3_txd1/l1rxda2/l1rxd0a2 ac22 1 table 21. mpc8250 vr package pinout list (continued) pin name ball 50 mpc8250 hardware speci?ations motorola pinout pb7/fcc3_txd0/fcc3_txd/ l1txda2/l1txd0a2 ae26 1 pb8/fcc3_rxd0/fcc3_rxd/txd3 ab23 1 pb9/fcc3_rxd1/l1txd2a2 ac26 1 pb10/fcc3_rxd2 ab26 1 pb11/fcc3_rxd3 aa25 1 pb12/fcc3_mii_crs/txd2 w26 1 pb13/fcc3_mii_col/l1txd1a2 w25 1 pb14/fcc3_mii_tx_en/rxd3 v24 1 pb15/fcc3_mii_tx_er/rxd2 u24 1 pb16/fcc3_mii_rx_er/clk18 r22 1 pb17/fcc3_mii_rx_dv/clk17 r23 1 pb18/fcc2_rxd3/l1clkod2/ l1rxd2a2 m23 1 pb19fcc2_rxd2/l1rqd2/l1rxd3a2 l24 1 pb20/fcc2_rxd1/l1rsyncd2/ l1txd1a1 k24 1 pb21/fcc2_rxd0/fcc2_rxd/ l1tsyncd2/l1gntd2 l21 1 pb22/fcc2_txd0/fcc2_txd/ l1rxdd2 p25 1 pb23/fcc2_txd1/l1txdd2 n25 1 pb24/fcc2_txd2/l1rsyncc2 e26 1 pb25/fcc2_txd3/l1tsyncc2/ l1gntc2 h23 1 pb26/fcc2_mii_crs/l1rxdc2 c26 1 pb27/fcc2_mii_col/l1txdc2 b26 1 pb28/fcc2_mii_rx_er/fcc2_r ts / l1tsyncb2/l1gntb2/txd1 a22 1 pb29/l1rsyncb2/ fcc2_mii_tx_en a21 1 pb30/fcc2_mii_rx_dv/l1rxdb2 e20 1 pb31/fcc2_mii_tx_er/l1txdb2 c20 1 pc0/dreq1/brgo7/smsyn2 / l1clkoa2 ae22 1 pc1/dreq2/brgo6/l1rqa2 aa19 1 pc2/fcc3_cd /done2 af24 1 pc3/fcc3_cts /d a ck2 /cts4 ae25 1 pc4/si2_l1st4/fcc2_cd ab22 1 pc5/si2_l1st3/fcc2_cts ac25 1 pc6/fcc1_cd ab25 1 pc7/fcc1_cts aa24 1 pc8/cd4 /rena4/si2_l1st2/cts3 y24 1 pc9/cts4 /clsn4/si2_l1st1/ l1tsynca2/l1gnta2 u22 1 table 21. mpc8250 vr package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 51 pinout pc10/cd3 /rena3 v23 1 pc11/cts3 /clsn3/l1txd3a2 u23 1 pc12/cd2 /rena2 t26 1 pc13/cts2 /clsn2 r26 1 pc14/cd1 /rena1 p26 1 pc15/cts1 /clsn1/smtxd2 p24 1 pc16/clk16/tin4 m26 1 pc17/clk15/tin3/brgo8 l26 1 pc18/clk14/tga te2 m24 1 pc19/clk13/brgo7/spiclk l22 1 pc20/clk12/tga te1 k25 1 pc21/clk11/brgo6 j25 1 pc22/clk10/done1 g26 1 pc23/clk9/brgo5/d a ck1 f26 1 pc24/clk8/t out4 g24 1 pc25/clk7/brgo4 e25 1 pc26/clk6/t out3 /tmclk g23 1 pc27/fcc3_txd/fcc3_txd0/clk5/ brgo3 b23 1 pc28/clk4/tin1/t out2 /cts2 /clsn2 e22 1 pc29/clk3/tin2/brgo2/cts1 /clsn1 e21 1 pc30/clk2/t out1 d21 1 pc31/clk1/brgo1 b20 1 pd4/brgo8/fcc3_r ts /smrxd2 af23 1 pd5/done1 ae23 1 pd6/d a ck1 ab21 1 pd7/smsyn1/fcc1_txclav2 ad23 1 pd8/smrxd1/brgo5 ad26 1 pd9/smtxd1/brgo3 y22 1 pd10/l1clkob2/brgo4 ab24 1 pd11/l1rqb2 y23 1 pd12 aa26 1 pd13 w24 1 pd14/l1clkoc2/i2cscl v22 1 pd15/l1rqc2 /i2csda u26 1 pd16/spimiso t23 1 table 21. mpc8250 vr package pinout list (continued) pin name ball 52 mpc8250 hardware speci?ations motorola pinout pd17/brgo2/spimosi r25 1 pd18/spiclk p23 1 pd19/spisel/brgo1 n22 1 pd20/r ts4 /tena4/l1rsynca2 m25 1 pd21/txd4/l1rxd0a2/l1rxda2 l25 1 pd22/rxd4l1txd0a2/l1txda2 j26 1 pd23/r ts3 /tena3 k22 1 pd24/txd3 g25 1 pd25/rxd3 h24 1 pd26/r ts2 /tena2 f24 1 pd27/txd2 h22 1 pd28/rxd2 b22 1 pd29/r ts1 /tena1 d22 1 pd30/txd1 c21 1 pd31/rxd1 e19 1 vccsyn d19 vccsyn1 k6 gndsyn b18 clkin2 k21 spare4 2 c14 pci_mode 3 ad24 spare6 2 b15 thermal0 4 e17 thermal1 4 c23 i/o power e6, f6, h6, l5, l6, p6, t6, u6, v5, y5, aa6, aa8, aa10, aa11, aa14, aa16, aa17, ab19, ab20, w21, u21, t21, p21, n21, m22, j22, h21, f21, f19, f17, e16, f14, e13, e12, f10, e10, e9 table 21. mpc8250 vr package pinout list (continued) pin name ball motorola mpc8250 hardware speci?ations 53 package description 1.5 package description the following sections provide the package parameters and mechanical dimensions. 1.5.1 package parameters package parameters are provided in table 22. core power l3, v4, w3, ac11, ad11, ab15, u25, t24, j24, h25, f23, b19, d17, c17, d10, c10 ground a2, b1, b2, a5, c5, c18, d4, d6, g2, l4, p1, r1, r4, ac4, ae7, ac23, y25, n24, j23, a23, d23, d20, e18, a13, a16, k10, k11, k12, k13, k14, k15, k16, k17, l10, l11, l12, l13, l14, l15, l16, l17, m10, m11, m12, m13, m14, m15, m16, m17, n10, n11, n12, n13, n14, n15, n16, n17, p10, p11, p12, p13, p14, p15, p16, p17, r10, r11,r12, r13, r14, r15, r16, r17, t10, t11, t12, t13, t14, t15, t16, t17, u10, u11, u12, u13, u14, u15, u16, u17 1 the default con?uration of the cpm pins (pa[0?1], pb[4?1], pc[0?1], pd[4?1]) is input. to prevent excessive dc current, it is recommended to either pull unused pins to gnd or vddh, or to con?ure them as outputs. 2 must be pulled down or left ?ating. 3 if pci is not desired, must be pulled up or left ?ating. 4 for information on how to use this pin, refer to mpc8260 powerquicc ii thermal resistor guide (an2271/d). table 22. package parameters package devices outline (mm) type interconnects pitch (mm) nominal unmounted height (mm) zu mpc8250 37.5 x 37.5 tbga 480 1.27 1.55 vr mpc8250vr 27 x 27 pbga 516 1 2.25 table 21. mpc8250 vr package pinout list (continued) pin name ball 54 mpc8250 hardware speci?ations motorola package description 1.5.2 mechanical dimensions 1.5.2.1 zu package dimensions figure 17 provides the mechanical dimensions and bottom surface nomenclature of the 480 tbga package. figure 17. mechanical dimensions and bottom surface nomenclature?80 tbga dim millimeters min max a 1.45 1.65 a1 0.60 0.70 a2 0.85 0.95 a3 0.25 b 0.65 0.85 d 37.50 bsc d1 35.56 ref e 1.27 bsc e 37.50 bsc e1 35.56 ref notes: 1. dimensions and tolerancing per asme y14.5m-1994. 2. dimensions in millimeters. 3. dimension b is measured at the maximum solder ball diameter, parallel to primary data a. 4. primary data a and the seating plane are de?ed by the spherical crowns of the solder balls. motorola mpc8250 hardware speci?ations 55 package description 1.5.2.2 vr package dimensions figure 18 provides the mechanical dimensions and bottom surface nomenclature of the 516 pbga package. figure 18. mechanical dimensions and bottom surface nomenclature?16 pbga 56 mpc8250 hardware speci?ations motorola ordering information 1.6 ordering information figure 19 provides an example of the motorola part numbering nomenclature for the mpc8250. in addition to the processor frequency, the part numbering scheme also consists of a part modi?r that indicates any enhancement(s) in the part from the original production design. each part number also contains a revision code that refers to the die mask revision number and is speci?d in the part numbering scheme for identi?ation purposes only. for more information, contact your local motorola sales of?e. figure 19. motorola part number key table 23. document revision history revision date substantive changes 0 11/2001 initial version 0.1 2/2002 note 2 for table 4 (changes in italics): ?..greater than or equal to 266 mhz, 200 mhz cpm... table 18: core and bus frequency values for the following ranges of modck_hmodck: 0011_000 to 0011_100 and 1011_000 to 1011_1000 table 19: footnotes added to pins at ae11, af25, u5, and v4. 0.2 3/2202 table 19: modi?d notes to pins ae11 and af25. table 19: added note to pins aa1 and ag4 (therm0 and therm1). 0.3 3/2002 table 19: modi?d note to pin af25. 0.4 5/2002 table 2: notes 2 and 3 addition of note on page 8:vddh and vdd tracking table 14: note 3 table 16: note 1 table 18: note 3 0.5 9/2002 addition of vr (516 pbga) package information. refer to sections 1.2.2, 1.4.2, and 1.5. 0.6 10/2002 table 21, ?r pinout? corrected ball assignment for the following pins?12?17, t a , pd5, pc2. 0.7 10/2002 table 21, ?r pinout? addition of l3 to the core (vddx) pin list (page 53) 0.8 11/2002 table 21, ?r pinout? addition of c18 to the ground (gnd) pin list (page 53) product code device number process technology package processor frequency die revision level mpc 8250 a c temperature range zu xxx (cpu/cpm/bus) x (a = 0.25 micron) (blank = 0 to 105 ?c c = -40 to 105 ?c) zu = 480 tbga vr = 516 pbga motorola mpc8250 hardware speci?ations 57 ordering information 0.9 8/2003 table 2: modi?ation to supply voltage ranges re?cted in notes 2, 3, and 4 addition of vccsyn to ?ote: core, pll, and i/o supply voltages following table 2 addition of figure 2 addition of note 1 to table 3 table 4: changes to ja . addition of jb and jc table 7, figure 8: addition of sp42a/sp43a figure 3 through figure 8: addition of notes or modi?ations table 9: change to sp10 table 14, table 16, and table 18: removal of pll bypass mode from clock tables table 19 and table 21: addition of note 1 addition of spiclk to pc19 in table 19 and table 21. it is documented correctly in the mpc8260 powerquicc ii family reference manual but had previously been omitted from table 19 and table 21. table 23. document revision history (continued) revision date substantive changes 58 mpc8250 hardware speci?ations motorola ordering information this page intentionally left blank motorola mpc8250 hardware speci?ations 59 ordering information this page intentionally left blank mpc8250ec/d how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217 1-303-675-2140 or 1-800-441-2447 japan: motorola japan ltd.; sps, technical information center, 3-20-1, minami-azabu minato-ku, tokyo 106-8573 japan 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kong 852-26668334 technical information center: 1-800-521-6274 home page: http://www.motorola.com/semiconductors information in this document is provided solely to enable system and software implementers to use motorola products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and speci?ally disclaims any and all liability, including without limitation consequential or incidental damages. ?ypical parameters which may be provided in motorola data sheets and/or speci?ations can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?ypicals must be validated for each customer application by customer s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its of?ers, employees, subsidiaries, af?iates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the u.s. patent and trademark of?e. digital dna is a trademark of motorola, inc. all other product or service names are the property of their respective owners. motorola, inc. is an equal opportunity/af?mative action employer. ?motorola, inc. 2003 search advanced | parametric | part number | faq select country motorola home | semiconductors home | contact us semiconductors products | design support | register | login motorola > semiconductors > products > network and communication processors > powerquicc, powerquicc ii, and powerquicc iii communications processors > mpc8250 mpc8250 : powerquicc ii? integrated communications processor the powerquicc ii? integrated communications processor family delivers excellent integration of processing power for networking and communications peripherals, providing customers with an innovative, total system solution for building high-end communications systems. motorola's powerquicc ii processor family is the next generation of motorola's leading powerquicc? line of integrated communications processors, providing higher performance in all areas of device operation, including greater flexibility, extended capabilities, and higher integration. motorola's leading powerquicc architecture integrates two processing blocks. one block is a high- performance embedded g2 core and the second block is the communications processor module (cpm). the cpm of the mpc8250 processor can support up to three fast serial communications controllers (fccs), one multichannel controller (mcc), four serial communications controllers (sccs), two serial management controllers (smcs), one serial peripheral interface (spi) and one i2c interface. the combination of the g2 core and the cpm, along with the versatility and performance of the powerquicc ii processor family, provides customers with enormous potential in developing networking and communications products while significantly reducing time-to-market development stages. block diagram mpc8250 features product highlights l 200-300 mhz high-speed embedded g2 core l powerful memory controller and system functions l enhanced 32-bit risc communications processor module l up to three multiport 10/100 mbps ethernet mac l up to 128 hdlc channels (each channel 64 kbps, full duplex) l up to four 10 mbps ethernet mac l integrated pci interface l strong 3rd-party tools support from motorola's smart networks alliance members typical applications l remote access concentrators l regional office routers l cellular infrastructure equipment l telecom switching equipment l ethernet switches l t1/e1-to-t3/e3 bridges l xdsl systems technical specifications l embedded g2 core at 200-300 mhz m 570 mips at 300 mhz (dhrystone 2.1) m high-performance, superscalar microprocessor m disable cpu mode page contents: features parametrics documentation tools applications orderable parts related products related links other info: faqs literature services 3rd party design help training 3rd party tool vendors 3rd party trainers rate this page -- - 0 + ++ care to comment? m supports the motorola external l2 cache chip (mpc2605) m improved low-power core m 16 kbyte data and 16 kbyte instruction cache m memory management unit m floating point unit m common on-chip processor (cop) l system interface unit (siu) m memory controller, including two dedicated sdram machines m pci up to 66 mhz m hardware bus monitor and software watchdog timer m ieee 1149.1 jtag test access port l high-performance cpm with operating frequency of 133 mhz m parallel i/0 registers m on-board 32 kbytes of dual-port ram m one multichannel controller (mcc), each supporting 128 full-duplex, 64 kbps, hdlc lines m virtual dma functionality m three fccs supporting 10/100 mbps ethernet (up to three) (ieee 802.3x with flow control) m three mii interfaces m four tdm interfaces (t1/e1) supporting four t1 lines or one t3 line l two bus architectures: one 64-bit 60x bus and one 32-bit pci or local bus m integrated pci interface l 1.8v or 2.0v internal and 3.3v i/o l 300 mhz power consumption: ~3 w l package: 480 tbga package (37.5 x 37.5 mm) l integrated pci capability mpc8250zq/vr features l 603e core with 16k inst and 16k data caches l 64-bit 60x bus, 32-bit pci bus l three fccs for 10/100 ethernet l 128 hdlc channels, 4 tdms l 4 sccs, 2 smcs, spi, i2c l 80kb rom, 32kb ram l memory controller built from sdram, upm, gpcm machines l performance m 200 mhz cpu, 166 mhz cpm, 66 mhz bus m ~ 1.5w @ full performance, 2.0v m extended temp available ( -40c to 105c) m technology n hip4 .25 micron, 3.3v i/o, 2.0v core n 516 pbga, 27x27mm, 1mm ball pitch n zq package has lead-bearing spheres n vr package is lead-free mpc8260 derivatives 8250 8255 8260 8264 8265 8266 serial communications controllers (sccs) 4 4 4 4 4 4 fast communication controllers (fccs) 3 2 3 3 3 3 i-cache (kbyte) 16 16 16 16 16 16 d-cache (kbyte) 16 16 16 16 16 16 ethernet (10t) up to 4 up to 4 up to 4 up to 4 up to 4 up to 4 ethernet (10/100) up to 3 up to 2 up to 3 up to 3 up to 3 up to 3 utopia ii ports 0 2 2 2 2 2 multi-channel hdlc up to 128 up to 128 up to 256 up to 256 up to 256 up to 256 pci interface yes -- -- -- yes yes ima functionality -- -- -- yes -- yes powerquicc ii masks and versions process family revision qualification mask pvr immr[16- 31] 1 rev_num 2 0.29 m (hip3) mpc8260 a.1 xc 0k26n 0x00810101 0x0011 0x0001 b.3 xc 3k23a 0x00810101 0x0023 0x003b c.2 xc 6k23a, 7k23a 0x00810101 0x0024 0x007b 0.25 m (hip4) a.0 xc 2k25a 0x80811014 0x0060 0x000d b.1 mc 4k25a 0x80811014 0x0062 0x002d c.0 mc 5k25a 0x80811014 0x0064 0x002d 0.13 m (hip7) mpc8280 0.0 ? 0k49m 0x80822011 0x0a00 0x0070 0.1 mc 1k49m 0x80822013 0x0a01 0x0070 mpc8272 0.0 pc 0k50m 0x80822013 0x0c00 0x0d00 tbd notes: 1. the immr[16-31] indicates the mask number. 2. the rev_num located at offset 0x8af0 in dpram indicates the cpm microcode revision number. masks and versions table last updated on 08jan2004. return to top mpc8250 parametrics cpu performance (max) (mips) operating frequency (max) (mhz) cpm operation frequency (max) (mhz) power dissipation (typ) (w) power dissipation (max) (w) core operating voltage (spec) (v) i/o operating voltage (max) (v) ambient operating temperature (min) (oc) 380, 505.4, 570 200, 266, 300 133, 166, 200 1.5, 2, 2.2, 2.3, 2.4, 2.5, 3 1.9, 2.8, 2.9, 3.1, 3.2 1.8, 2 3.3 -40, 0 junction operating temperature (max) (oc) integrated memory controller l1 cache instructional (max) (kbyte) l1 cache data (max) (kbyte) internal dual- port ram (kbyte) dma controller channels gpio pins bus interface 105 edo, eprom, flash, sdram, sram 16 16 32 28 120 60x, local, pci 2.2 external bus speed (max) (mhz) serial interface timers other peripherals communication protocol networking application function package description type channels 66 i2c, mii, spi, tdm, uart 4 dma controller async hdlc, appletalk, bisync, ethernet, fast ethernet, gci, hdlc, ss7, transparent, uart integrated control/data plane pbga 516 27*27*1.25p1.0, tbga 480 37*37*1.7p1.27 view expanded set of parameters return to top mpc8250 documentation documentation application note id name vendor id format size k rev # date last modified order availability an2059 hints for debugging the cpm motorola pdf 25 0 7/25/1997 an2271/d mpc8260 powerquicc ii thermal resistor guide motorola pdf 56 0.0 3/19/2002 an2290 mpc8260 powerquicc ii design checklist motorola pdf 249 1.1 1/27/2004 an2291 differences among powerquicc ii devices and revisions motorola pdf 187 1.4 9/30/2003 an2335/d mpc8260 dual-bus architecture and performance considerations motorola pdf 61 0 10/15/2002 an2347/d using an mpc8260 and an mpc7410 with shared memory motorola pdf 461 0 10/01/2002 an2349/d mpc8260 reset and configuration word motorola pdf 90 0 10/01/2002 an2431 powerquicc ii pci example software motorola pdf 180 0 12/20/2002 an2431sw/d powerquicc ii pci example software motorola zip 726 0 12/20/2002 an2491 simplified mnemonics for powerpc instructions motorola pdf 524 0 9/30/2003 an2547 detecting a cpm overload on the powerquicc ii motorola pdf 80 0 6/30/2003 an2547sw software detecting cpm overload (accompanies an2547) motorola zip 288 0 6/30/2003 - an2585 mpc82xx powerquicc ii reset: sources, effects, and comments motorola pdf 84 0.1 2/26/2004 an2586 mpc8260 powerquicc ii family power distribution trends motorola pdf 333 0 1/13/2004 an2587 software migration from the npe495h/l to powerquicc ii motorola pdf 439 0.1 1/28/2004 an2638 effects of clock jitter on the mpc8260 (hip3 and hip4) motorola pdf 299 0 12/12/2003 data sheets id name vendor id format size k rev # date last modified order availability mpc8250ec mpc8250 hardware specifications motorola pdf 925 0.9 8/15/2003 errata - click here for important errata information id name vendor id format size k rev # date last modified order availability mpc8260ce mpc8260 powerquicc ii family device errata motorola pdf 470 4.4 4/29/2004 fact sheets id name vendor id format size k rev # date last modified order availability mpc8260fact mpc8260 powerquicc ii integrated comm proc fam motorola pdf 142 7 6/05/2003 mpc8260mfact mpc8260 powerquicc ii microcode motorola pdf 51 1 3/27/2002 packaging information id name vendor id format size k rev # date last modified order availability mpc8250pbfreepkg powerquicc ii mpc8250a pb-free packaging presentation motorola pdf 329 1 7/11/2003 - pbgapres pbga packaging customer tutorial motorola pdf 1923 1 8/05/2003 - tbgaprespkg tbga packaging customer tutorial motorola pdf 1784 0 8/05/2003 - product brief id name vendor id format size k rev # date last modified order availability mpc8250ts mpc8250 powerquicc ii technical summary motorola pdf 85 0.1 11/12/2001 product change notices id name vendor id format size k rev # date last modified order availability pcn8499 powerquicc (.25um) hip4 spec changes motorola htm 11 0 1/30/2003 - pcn8663 new tray for 37.5 x 37.5 tbga package motorola htm 38 0 3/28/2003 - pcn9081 37.5 x 37.5 mm tbga tray motorola htm 12 0 8/06/2003 - pcn9322 pqii hip4 transition pci device motorola htm 9 0 10/29/2003 - product numbering scheme id name vendor id format size k rev # date last modified order availability 82xxpns mpc82xx hip3/hip4 part numbering scheme motorola jpg 134 2 9/30/2003 - reference manual id name vendor id format size k rev # date last modified order availability g2corerm g2 core reference manual motorola pdf 5948 1 6/27/2003 mpc60xbusrm the bus interface for 32-bit microprocessors that implement the powerpc architecture motorola pdf 2527 0.1 1/14/2004 mpc8260ess7umad/d enhanced ss7 microcode specification motorola pdf 238 0.1 12/05/2002 mpc8260um mpc8260 powerquicc ii family reference manual motorola pdf 14509 1 5/29/2003 mpc8260umad mpc8260 powerquicc ii users manual errata motorola pdf 115 1.2 4/30/2004 mpcfpe32b/ad programming environments manual for 32-bit implementations of the powerpc architecture motorola pdf 6909 2 12/21/2001 mpcfpe32bad/ad errata to mpcfpe32b, programming environments manual for 32-bit implementations of the power pc architecture, rev. 2 motorola pdf 40 0 10/11/2002 selector guide id name vendor id format size k rev # date last modified order availability sg1007 network and communications processors selector guide - quarter 2, 2004 motorola pdf 178 0 4/01/2004 white paper id name vendor id format size k rev # date last modified order availability mpc826xsdramwp timing considerations when interfacing the powerquicc ii to sdram motorola pdf 103 0.1 3/09/2004 return to top mpc8250 tools hardware tools analyzers logic id name vendor id format size k rev # order availability tla715/tla721 tla700 logic analyzers tektronix - - - - board testers id name vendor id format size k rev # order availability scanplus scanplus corelis - - - - 4000-994020-001 master 4031 functional test and debug solutions for boards carrying motorola? and ibm? powerpc? processors with cop debug port (740, 750, 750dd2, 750dd3, 755, 603e, 8240, 8250a, 8255a, 8260a, 8264a, 8265a, 8266a, 7400, 7410, etc.) intltest - - - - emulators/probes/wigglers id name vendor id format size k rev # order availability cwcodetest* codetest metrowerks - - - - bdi1000/bdi2000 bdi1000/bdi2000 abatron develops and produces high-quality, high-speed bdm and jtag debug tools (bdi family) for software development environments from leading vendors. abatron - - - - 10200a netice-r option 2/2m corelis - - - - probe green hills probe & slingshot greenhills - - - - 4000-994020-- 001 master 4031 functional test and debug solutions for boards carrying motorola? and ibm? powerpc? processors with cop debug port (740, 750, 750dd2, 750dd3, 755, 603e, 8240, 8250a, 8255a, 8260a, 8264a, 8265a, 8266a, 7400, 7410, etc.) intltest - - - - ic30001 ic3000 activeemulator isys - - - - ic40000 ic4000 activeemulator isys - - - - visionice visionice ii windriv - - - - visionprobe visionprobe ii windriv - - - - wpice wind?power ice windriv - - - - evaluation/development boards and systems id name vendor id format size k rev # order availability mpc8260ads_ecom mpc8260ads daughter card for telephony applications (e1) motorola - - - mpc8260ads_tcom mpc8260ads daughter card for telephony applications (t1) motorola - - - mpc8266ads_pciai mpc8266 application development system (add-in card) motorola - - - pq2fads_vr mpc82xx family application development system motorola - - - pq2fads_zu mpc82xx family application development system motorola - - - rattler-pci rattler-pci anamic - - - - rattler1 rattler1 anamic - - - - taipan taipan anamic - - - - sbcpqii sbcpowerquiccii windriv - - - - models bsdl id name vendor id format size k rev # order availability mpc8260bsdl4 powerquicc ii bsdl (hip4) (03/15/2004) motorola zip 10 1.1 - mpc82xx516bsdl mpc82xx 516-pin bsdl model (10/22/2003) motorola zip 9 1.1 - full functional models id name vendor id format size k rev # order availability ep100 powerpc bus slave eureka - - - - ep201 powerpc bus master eureka - - - - ep300 powerpc bus arbiter eureka - - - - ep433 powerpc-pci bridge eureka - - - - es100 powerpc system controller eureka - - - - ibis id name vendor id format size k rev # order availability mpc82xxibis powerquicc ii family ibis models this package contains the ibis models for the powerquicc ii family of communications processors. hip3 and hip4 processes. local and pci bus configurations. 480 tbga and 516 pbga packages. (10/30/2003) motorola zip 81 2.7 - timing models id name vendor id format size k rev # order availability pqiigpcmtime gpcm timing generator (05/29/2003) motorola exe 176 1 - software application software calculators id name vendor id format size k rev # order availability mpc8260calc1 power consumption calculator for all powerquicc ii processors (04/28/2004) motorola zip 491 2.1 - mpc8260calc2 cpm performance calculator for all powerquicc ii and powerquicc iii processors (12/11/2003) motorola zip 404 3.1.2 - code examples id name vendor id format size k rev # order availability mpc8260cod08 fast ethernet on the fcc of the powerquicc ii (10/13/2003) motorola zip 140 2 - mpc8260cod09 multichannel communication controller of the powerquicc ii (09/04/2002) motorola zip 176 0 - mpc8260cod11 example software for the powerquicc ii family: fec frames using phyless mii (08/02/2002) motorola zip 614 0 - microcode id name vendor id format size k rev # order availability mpc8260mc05 ram microcode patches for powerquicc ii family device errata (04/27/2004) motorola zip 0 4.1 - board support packages id name vendor id format size k rev # order availability arc-mot- mqxbsp mqx board support packages bsps for motorola coldfire, powerpc, and 68k embedded processors arc - - - - ep bsp ep bsp embedded planet board support packages provide complete software drivers for mpc 8xx and 82xx processors for linux, vxworks and integrity. embedded planet can also develop customer specific software for many operating systems. emdplan - - - - device drivers id name vendor id format size k rev # order availability mpc8266drv01 powerquicc ii pci driver for use with the mpc8266 application development system and metrowerks codewarrior motorola zip 3492 0 - pcs planetcore planetcore provides a complete set of firmware device drivers for 8xx and 82xx motorola processors. these drivers include an application / rtos boot loader, flash burner and diagnostics. customer specific drivers can also be developed. emdplan - - - - libraries id name vendor id format size k rev # order availability pn311-1 kwikpeg gui kadak's kwikpeg graphical user interface (gui) is derived from peg, a professional, high-quality graphic system created by swell software, inc. to enable you, the embedded system developer, to easily add graphics to your products. kadak - - - - operating systems id name vendor id format size k rev # order availability ara-mot-82xx arabella linux for motorola 82xx processors arabella linux for motorola 82xx processors is a full, commercial linux distribution for the 82xx family of processors. it includes support for many of the on chip peripherals including security, atm, pci, usb, pcmcia, i2c and others. arabella - - - - arc-mot-mfs mfs ms-dos file system is a portable, compatible implementation of the microsoft ms-dos file system arc - - - - arc-mot-mqx mqx real time operating system a robust, high performance, royalty-free kernel designed for deeply embedded applications requiring a small footprint and fast response arc - - - - arc-mot- oschanger arc-os changer provides developers the freedom to migrate from either psosystem or vxworks to mqx rtos while reusing an existing code base arc - - - - cmx-rtx cmx-rtx cmx - - - - dpp.82xxx.krn ose real-time operating system enea - - - - threadx threadx rtos. royalty-free real-time operating system (rtos) for embedded applications. threadx is small, fast, and royalty-free making it ideal for high-volume electronic products. expresslog - - - - px382-1 amx ppc32 amx is a full featured rtos for the powerpc family. amx has been tested on the est sbc8260, embedded planet rpx lite mpc823 and motorola ultra 603, mbx860, mpc860 ads and mpc860 fads. kadak - - - - vxworks 5.x vxworks vxworks, the run-time component of tornadoii for vxworks, is the most widely adopted real-time operating system (rtos) in the embedded industry, with a reputation for performance, flexibility, compatibility and scalability. windriv - - - - protocol stacks id name vendor id format size k rev # order availability arc-mot-httppro http pro http pro includes all of the features and benefits of http plus more arc - - - - arc-mot-ipshield ipshield security product support for ipsec, ike, ssl and ssh. also supports hardware accelerated encryption on processors with integrated security engine. arc - - - - arc-mot- networkprotocols network protocols compact, high performance, portable embedded tcp/ip networking stack and a wide variety of optional networking protocols that are tightly integrated with the mqx (tm) rtos arc - - - - arc-mot-pop3 pop3 enables client embedded devices to receive e-mail from any pop3 server arc - - - - arc-mot-rtcs rtcs a real-time, high performance tcp/ip stack designed specifically for embedded networking applications such as ip phones, bridges, routers, pagers, pdas, cellular phones, and set- top boxes arc - - - - arc-mot-smtp smtp consists of source code development tools and an snmp v1/v2/v3 agent arc - - - - rstp avnirstp avnisoft's avnirstp is a completely portable ansi c compliant implementation of the ieee 802.1w rstp algorithm and protocol. it includes the avniport platform abstraction layer to simplify integration with target platforms. avnisoft - - - - targettcp tcp/ip stack targettcp, is a fast, reliable, re-entrant, full-featured tcp/ip protocol stack designed specifically for high-performance embedded networking. the code has a small footprint and is well suited to memory constrained environments. blunk - - - - cmx tcp/ip cmx tcp/ip cmx - - - - pn713-1 kwiknet the kwiknet tcp/ip stack enables you to add networking features to your products with a minimum of time and expense. kwiknet is a compact, high performance stack built with kadak's characteristic simplicity, flexibility and reliability. kadak - - - - infolink-stackname infolink protocol software family link - - - - psq40xxxx rtxc quadnet networking protocols full protocol suite: tcp, udp, slip, icmp, arp, rarp, bootp, dns, igmp v2, rip v2 and nat with berkeley sockets api. plus dhcp, http, mail, tftp, ftp, telnet, sntp, snmp, ppp and more quadros - - - - software tools code translation id name vendor id format size k rev # order availability pa68k-ppc portasm/68k for powerpc microapl - - - - pa86-ppc portasm/86 for powerpc microapl - - - - compilers id name vendor id format size k rev # order availability cweppc codewarrior development studio for powerpc isa metrowerks - - - cwlinppc codewarrior development studio. linux application edition for powerpc metrowerks - - - gnutool gnu tool set anamic - - - - arc-mot- compiler metaware c/c++ compiler tool suite optimized compiler for motorola processors arc - - - - multi compiler multi compiler for powerpc greenhills - - - - diab diab c/c++ compiler windriv - - - - debuggers id name vendor id format size k rev # order availability arc-mot- debugger metaware seecode debugger c/c++ debugger arc - - - - powerpc debugger multi debugger greenhills - - - - la-7729 trace32-icd trace32-icd for powerquicc ii is a high performance jtag debugger for c ,c++ and java. a usb 2.x, lpt or ethernet interface is available for connection to any pc or workstation. a flash programming utility is included. laubach - - - - ide (integrated development environment) id name vendor id format size k rev # order availability multi multi greenhills - - - - ic-sw-opr winidea isys - - - - wpide wind?power ide windriv - - - - return to top applications networking and communications soho regional office router return to top orderable parts information part number package description tape and reel pb-free terminations application/ qualification tier status budgetary price qty 1000+ ($us) info order kmpc8250acvrihbc pbga 516 27*27*1.25p1.0 no yes available - more kmpc8250aczqihbc pbga 516 27*27*1.25p1.0 no no available - more kmpc8250aczumhbc tbga 480 37*37*1.7p1.27 no no available - more kmpc8250avrihbc pbga 516 27*27*1.25p1.0 no no available - more kmpc8250azupibc tbga 480 37*37*1.7p1.27 no no available - more mpc8250acvrihbb pbga 516 27*27*1.25p1.0 no yes not recommended for new design - more mpc8250acvrihbc pbga 516 27*27*1.25p1.0 no yes available - more mpc8250aczqihbb pbga 516 27*27*1.25p1.0 no no not recommended for new design - more - mpc8250aczqihbc pbga 516 27*27*1.25p1.0 no no available - more mpc8250aczumhbb tbga 480 37*37*1.7p1.27 no no not recommended for new design - more mpc8250aczumhbc tbga 480 37*37*1.7p1.27 no no available - more mpc8250avrihbb pbga 516 27*27*1.25p1.0 no yes not recommended for new design - more mpc8250avrihbc pbga 516 27*27*1.25p1.0 no yes available - more mpc8250azqihbb pbga 516 27*27*1.25p1.0 no no not recommended for new design - more - mpc8250azqihbc pbga 516 27*27*1.25p1.0 no no available - more mpc8250azumhbb tbga 480 37*37*1.7p1.27 no no not recommended for new design - more mpc8250azumhbc tbga 480 37*37*1.7p1.27 no no available - more mpc8250azupibb tbga 480 37*37*1.7p1.27 no no not recommended for new design - more mpc8250azupibc tbga 480 37*37*1.7p1.27 no no available - more xpc8250aczuifba tbga 480 37*37*1.7p1.27 no no not recommended for new design - more - xpc8250aczumhba tbga 480 37*37*1.7p1.27 no no not recommended for new design - more - xpc8250azuifba tbga 480 37*37*1.7p1.27 no no not recommended for new design - more - xpc8250azumhba tbga 480 37*37*1.7p1.27 no no not recommended for new design - more - XPC8250AZUPHBA tbga 480 37*37*1.7p1.27 no no not recommended for new design - more - note: are you looking for an obsolete orderable part? click here to check our distributors' inventory. return to top related products mc33702 : microprocessor power supply (3.0 a) the 33702 is a monolithic ic providing an efficient means of obtaining power for the motorola power quicc i and ... return to top related links networking powerpc? processors powerquicc? communication processors security processors return to top www.motorola.com | site map | contact motorola | terms of use | privacy practices ? copyright 1994-2004 motorola, inc. all rights reserved. |
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